Turbo encoder apparatus

A turbo encoder apparatus for receiving an input of data and outputting encoded bitstreams, the turbo encoder apparatus comprising:

• a first element encoder for receiving an input of a bitstream of the data, which has a size of a designated code block and in which a padding has been implemented, in the unit of plural bits, encoding the input of the bitstream of the data, and generating a first output bitstream in the unit of plural bits;
• an internal interleaver for generating an interleaved input bitstream from the bitstream of the data;
• a second element encoder for receiving an input of the interleaved input bitstream in the unit of plural bits, encoding the input of the interleaved input bitstream, and generating a second output bitstream in the unit of plural bits;
• a trellis-termination-encoder for generating bits for trellis terminations of the first element encoder and the second element encoder;
• and
• a bitstream assembler for receiving the first output bitstream, the second output bitstream, and the bits for the trellis terminations and generating an input bitstream for a rate matching.