Device and method for converting data rate
AssigneeElectronics and Telecommunications Research Institute
InventorsMi Jeong Park, Ik Soo Eo, Sang-Kyun Kim
Life of this patent
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Abstract
A data rate conversion device generates a first parameter representing a memory address position to sample and a second parameter representing a phase value of an estimation time point, records input data at a memory based on an input clock, outputs sampled continued data from the memory using the first parameter based on an output clock, and generates and outputs final data using the continued data, a plurality of filter coefficients, and the second parameter.
Claims18
A device that converts a rate of input data, the device comprising:
- a rate counter that calculates a rate representing a ratio of frequencies of an input clock and an output clock, wherein the rate counter comprises:
- an output clock counter that performs a counting operation based on the output clock according to a first enable signal;
- a counter enable generator that generates a second enable signal using a counting value of the output clock counter and that generates a third enable signal by delaying the second enable signal based on the input clock;
- and
- an input clock counter that generates the rate by performing the counting operation based on the input clock according to the first enable signal and the second enable signal;
- a phase accumulator that generates a first parameter representing a memory address position to sample using the rate and a second parameter representing a phase value of an estimation time point;
- an asynchronous data sampler that records data that is input based on an input clock and that outputs continued data using the first parameter based on an output clock;
- a filter coefficient operation unit that calculates a plurality of first operation values using the continued data and a plurality of filter coefficients;
- and
- a phase operation unit that generates and outputs final data using the plurality of first operation values and the second parameter.
A method in which a data rate conversion device converts a rate of input data, the method comprising:
- calculating a rate representing a ratio of frequencies of an input clock and an output clock, wherein the calculating of the rate comprises:
- counting based on the output clock according to a first enable signal;
- generating a second enable signal using the counting value;
- generating a third enable signal by delaying the second enable signal based on the input clock;
- and
- calculating the rate by counting based on the input clock according to the first enable signal and the second enable signal;
- generating a first parameter representing a memory address position to sample according to the rate and a second parameter representing a phase value of an estimation time point;
- recording input data based on the input clock at a memory;
- outputting continued data from the memory using the first parameter based on the output clock;
- and
- outputting final data using the continued data, a plurality of filter coefficients, and the second parameter.
Dependencies are inferred from the claim text.