Digital power gating with global voltage shift

A method of shifting a supply voltage during power gating of the supply voltage provided to a functional block, comprising:

• controlling activation of each of a plurality of current devices coupled between a non-gated supply bus and a gated supply bus;
• asserting the digital control value to activate a sufficient number of the current devices to clamp the voltage of the gated supply bus to the non-gated supply bus during a full power mode;
• in response to receiving a gate control signal, performing power gating by periodically adjusting a magnitude of the digital control value until the voltage of the gated supply bus reaches a state retention voltage level that reduces leakage current while retaining a digital state of the functional block;
• and
• during said performing power gating, performing a global adjustment of the digital control value to increase the voltage of the gated supply bus to prevent the voltage of the gated supply bus from falling below the state retention voltage level in response to an impending change of voltage of the non-gated supply bus.

A computer program product encoded in at least one non-transitory computer usable medium for use with a computing device, the computer program product comprising:

• computer usable program code embodied in said medium for specifying an integrated circuit, the computer usable program code comprising:
• first program code for specifying a global supply bus and a gated supply bus;
• second program code for specifying a functional circuit having a voltage supply input coupled to said gated supply bus;
• and
• third program code for specifying a digital power gating system with global voltage shift, comprising:
• a plurality of gating devices, each said gating device having a pair of current terminals coupled between said global supply bus and said gated supply bus and each having a control terminal;
• a power gating control system that controls a digital control value, wherein said digital control value comprises a plurality of bits in which each bit of said digital control value is provided to control at least one control terminal of said plurality of gating devices to control activation of a corresponding subset of said plurality of gating devices, wherein said power gating control system is configured to perform power gating by successively adjusting said digital control value to reduce a voltage of said gated supply bus to a state retention voltage level that reduces leakage current while retaining a digital state of said functional circuit;
• and
• a global control adjuster that performs a global adjustment of said digital control value to increase said voltage of said gated supply bus during said power gating to prevent said voltage of said gated supply bus from falling below said state retention voltage level in response to an impending change of a voltage of said global supply bus.