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US 9,000,820 B2Granted
Semiconductor device
AssigneeSK hynix Inc.
InventorsYong-Hoon Kim, Hyun-Woo Lee
Life of this patent
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Abstract
A semiconductor device including a common delay circuit configured to delay an input signal in response to a delay control code to output a first delayed input signal and a second delayed input signal; a first delay circuit configured to delay the first delayed input signal in response to the delay control code and to output a first output signal; and a second delay circuit configured to delay the second delayed input signal in response to the delay control code and to output a second output signal.
Claims8
A semiconductor device, comprising:
- an input delay circuit configured to generate a first delay signal by delaying an input signal through a common delay path whose length is determined in response to a delay control code, and generate a second delay signal by delaying the first delay signal through an additional delay path whose length is determined in response to the delay control code;
- a first output delay circuit configured to delay the first delay signal through a first delay path whose length is determined in response to the delay control code and output a delayed first delay signal;
- and
- a second output delay circuit configured to delay either the first delay signal or the second delay signal through a second delay path whose length is determined in response to the delay control code and output a delayed first delay signal or a delayed second delay signal,
- wherein when one bit among multi-bit delay control codes included in the delay control code is selectively enabled as a highest enabled bit, lower bits of the delay control code are all enabled while higher bits of the delay control code are all disabled.
2 more elements
Dependencies are inferred from the claim text.