Signal generating circuit

A signal generating circuit, comprising:

• a first signal amplifying circuit, arranged to generate a first amplified signal according to a first supply current, a reference signal, and an output signal of the signal generating circuit;
• a soft-start circuit, arranged to generate a control signal according to a soft-start signal;
• a current controlled circuit, arranged to generate the first supply current according to the soft-start signal;
• and
• a pass transistor, arranged to generate the output signal according to an error amplified signal and the control signal, wherein the error amplified signal is derived from the first amplified signal;
• wherein the current controlled circuit further generates a second supply current for a second signal amplifying circuit according to the soft-start signal, and the signal generating circuit further comprises:
• said second signal amplifying circuit, coupled between the first signal amplifying circuit and the pass transistor, and arranged to generate a second amplified signal to be the error amplified signal according to the second supply current and the first amplified signal.

A signal generating circuit, comprising:

• a first signal amplifying circuit, arranged to generate a first amplified signal according to a first supply current, a reference signal, and an output signal of the signal generating circuit;
• a second signal amplifying circuit, arranged to generate a second amplified signal according to a second supply current and the first amplified signal;
• a soft-start circuit, arranged to generate a control signal according to a soft-start signal;
• a current controlled circuit, arranged to generate the first supply current and the second supply current according to an enable signal;
• a pass transistor, arranged to generate the output signal according to the second amplified signal and the control signal;
• and
• a compensating circuit, coupled between an input terminal of the second signal amplifying circuit and an output terminal of the second signal amplifying circuit;
• wherein when the enable signal enables the current controlled circuit, the control signal has a first logic level during a predetermined time interval, the control signal has a second logic level different from the first logic level when the predetermined time interval is over, and the compensating circuit is arranged to provide a first impedance during the predetermined time interval and to provide a second impedance when the predetermined time interval is over, wherein the first impedance is different from the second impedance.