Flexible processing method for metal-insulator-metal capacitor formation

An integrated circuit device comprising:

• a capacitor bottom plate over a substrate;
• a capacitor top plate separated from the capacitor bottom plate by a first region, wherein the first region extends from the capacitor bottom plate to the capacitor top plate and is filled by a dielectric layer that has a first material extending throughout the dielectric layer;
• an interconnect feature coplanar with the capacitor bottom plate, wherein the dielectric layer extends from the first region to over the interconnect feature without extending into a second region below a top surface of the interconnect feature and between the capacitor bottom plate and the interconnect feature, the dielectric layer having a first thickness in the first region and a second thickness over the interconnect feature, wherein the second thickness is greater than the first thickness;
• and
• a second dielectric layer over the capacitor top plate and in direct contact with the capacitor top plate, wherein the second dielectric layer is continuous and has a bottom surface in physical contact with both a top surface of the capacitor top plate and a sidewall of the capacitor top plate.

An integrated circuit device comprising:

• a first dielectric layer with a first region and a second region connected to the first region, the first region having a first thickness and the second region having a second thickness greater than the first thickness, wherein the first dielectric layer has a first dielectric material throughout the first dielectric layer;
• a capacitor bottom plate underlying and in physical contact with the first region;
• a capacitor top plate overlying and in physical contact with the first region;
• an interconnect feature underlying and in physical contact with the second region, a first surface of the interconnect feature being aligned with a first surface of the capacitor bottom plate;
• a second dielectric layer underlying the first dielectric layer, the second dielectric layer having a top surface coplanar with the capacitor bottom plate and the interconnect feature;
• and
• a third dielectric layer overlying and in contact with a top surface of the capacitor top plate, wherein the third dielectric layer has a continuous first material in contact with both the top surface of the capacitor top plate and a sidewall of the capacitor top plate.