Method for forming and integrating metal gate transistors having self-aligned contacts and related structure
AssigneeGlobalfoundries Inc.
InventorsAndreas H. Knorr, Frank Scott Johnson
Life of this patent
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Abstract
According to one exemplary embodiment, a method for forming at least one metal gate transistor with a self-aligned source/drain contact includes forming a metal gate over a substrate. The method further includes forming a source/drain region in the substrate adjacent to the metal gate. The method also includes forming a conformal etch stop layer over the metal gate and the source/drain region. The method further includes forming a source/drain contact over the source/drain region, where the conformal etch stop layer imposes a pre-determined distance between the source/drain contact and the metal gate, thereby causing the source/drain contact to be self-aligned to the metal gate.
Claims19
A method for forming at least a first metal gate transistor and a second metal gate transistor with a self-aligned source/drain contact, said method comprising:
- forming a first metal gate and a second metal gate over a substrate;
- forming inner spacers adjacent each of said first metal gate and said second metal gate;
- forming a source/drain region in said substrate adjacent to said inner spacers, said source/drain region not situated directly beneath said inner spacers;
- forming outer spacers adjacent said inner spacers, said outer spacers situated directly on and making contact with said source/drain region;
- forming a conformal etch stop layer over said first metal gate, said second metal gate, and said source/drain region;
- forming a source/drain contact over said source/drain region and between portions of said conformal etch stop layer over said outer spacers, said source/drain contact having a generally uniform width determined by the space between said portions;
- wherein said conformal etch stop layer imposes a pre-determined distance between said source/drain contact and each of said first metal gate and said second metal gate, thereby causing said source/drain contact to be self-aligned to said first metal gate and said second metal gate;
- said first metal gate transistor and said second metal gate transistor being integrated with a polysilicon device situated over said substrate, said polysilicon device including a polysilicon segment having sloped sidewalls.
A structure including at least a polysilicon device, and a first metal gate transistor and a second metal gate transistor with a self-aligned source/drain contact, said structure comprising:
- a first metal gate and a second metal gate situated over a substrate;
- inner spacers adjacent said first metal gate and said second metal gate;
- a source/drain region situated in said substrate adjacent to said inner spacers, said source/drain region not situated directly beneath said inner spacers;
- outer spacers adjacent said inner spacers, said outer spacers situated directly on and making contact with said source/drain region;
- a conformal etch stop layer situated over said first metal gate, said second metal gate, and said source/drain region;
- a source/drain contact situated over said source/drain region and adjacent portions of said conformal etch stop layer over said outer spacers, said source/drain contact having a generally uniform width determined by the space between said portions;
- wherein said conformal etch stop layer imposes a pre-determined distance between said source/drain contact and each of said first metal gate and said second metal gate, thereby causing said source/drain contact to be self-aligned to said first metal gate and said second metal gate;
- said first metal gate transistor and said second metal gate transistor being integrated with said polysilicon device, said polysilicon device including a polysilicon segment having sloped sidewalls.
Dependencies are inferred from the claim text.