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US 9,000,531 B2Granted
Method and manufacture of transistor devices
AssigneeInfineon Technologies AG
InventorHong-Jyh Li
Life of this patent
Estimating the term…
Abstract
A method of forming transistors and structures thereof. A CMOS device includes high k gate dielectric materials. A PMOS device includes a gate that is implanted with an n type dopant. The NMOS device may be doped with either an n type or a p type dopant. The work function of the CMOS device is set by the material selection of the gate dielectric materials. A polysilicon depletion effect is reduced or avoided.
Claims18
A complimentary metal oxide semiconductor (CMOS) device comprising:
- a positive channel metal oxide semiconductor (PMOS) transistor formed in a first region of a workpiece, the PMOS transistor comprising:
- a first high-k gate dielectric disposed over and physically contacting the workpiece;
- a second high-k gate dielectric comprising aluminum, the second high-k dielectric directly disposed over and physically contacting the first high-k dielectric;
- and
- a first gate disposed directly over and physically contacting the second high-k gate dielectric;
- and
- a negative channel metal oxide semiconductor (NMOS) transistor formed in a second region of the workpiece, the NMOS transistor comprising:
- a third high-k gate dielectric disposed over and physically contacting the workpiece;
- and
- a second gate directly disposed over and physically contacting the third gate dielectric, the second gate comprising a second semiconductive material, wherein the first gate and the second gate comprise a material selected from TiN, TaN, W, Al, Ru.
7 more elements
A complimentary metal oxide semiconductor (CMOS) device comprising:
- a positive channel metal oxide semiconductor (PMOS) transistor formed in a first region of a workpiece, the PMOS transistor comprising:
- a first high-k gate dielectric disposed over and physically contacting the workpiece;
- a second high-k dielectric comprising aluminum, the second high-k dielectric directly disposed over and physically contacting the first high-k dielectric;
- and
- a first gate disposed directly over and physically contacting the second high-k gate dielectric, the first gate comprising a first semiconductive material comprising an n type dopant;
- and
- a negative channel metal oxide semiconductor (NMOS) transistor formed in a second region of the workpiece, the NMOS transistor comprising:
- a third high-k gate dielectric disposed over and physically contacting the workpiece;
- and
- a second gate directly disposed over and physically contacting the third gate dielectric, the second gate comprising a second semiconductive material comprising the n type dopant, wherein the first gate and the second gate comprise a material selected from TiN, TaN, W, Al, Ru.
7 more elements
Dependencies are inferred from the claim text.