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US 9,000,528 B2Granted
Semiconductor device and fabrication method
AssigneeSK hynix Inc.
InventorYong Sun Jung
Life of this patent
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Abstract
A semiconductor device using a small-sized metal contact as a program gate of an antifuse, and a method of fabricating the same are described. The semiconductor device includes a metal contact structure formed on a semiconductor substrate of a peripheral circuit area, and includes a first gate insulating layer to be ruptured. A gate structure is formed on the semiconductor substrate to one side of the metal contact structure.
Claims13
A semiconductor device, comprising:
- a semiconductor substrate of a peripheral circuit area, the semiconductor substrate having a junction region;
- a metal contact structure having a metal contact and a gate insulating layer that has a thickness configured to be ruptured, the metal contact structure formed on the junction regions of the semiconductor substrate such that the gate insulating layer is between the metal contact and the junction region;
- and
- a gate structure formed on the semiconductor substrate at one side of the metal contact structure.
1 more element
A semiconductor device, comprising:
- a first metal contact structure formed on a semiconductor substrate of a peripheral circuit area and including a first gate insulating layer and a first metal contact formed on the first gate insulating layer, the first gate insulating layer positioned between a first junction region of the semiconductor substrate and the first metal contact and configured to be ruptured when a first voltage is applied;
- a first gate structure formed on the semiconductor substrate at one side of the metal contact structure, and in which a channel region is configured to be formed below the first gate structure when a second voltage is applied;
- a second gate structure formed on the semiconductor substrate at one side of the first gate structure and to which a third voltage is applied;
- and
- a second metal contact structure including a second gate insulating layer, and a second metal contact formed on the second gate insulating layer, the second metal contact stucture formed on the semiconductor substrate at one side of the second gate structure and to which the third voltage is applied, the second gate insulating layer positioned between a second junction region of the semiconductor substrate and the second metal contact.
2 more elements
Dependencies are inferred from the claim text.