MOSFET structure with T-shaped epitaxial silicon channel

A semiconductor device comprising:

• a transistor area on a silicon substrate and defined by a first set of opposed edges and a second set of opposed edges orthogonal to said first set of opposed edges, each said edge bounded by a corresponding STI, shallow trench isolation, structure;
• a silicon layer disposed on said silicon substrate in said transistor area and including overhang portions disposed over respective inwardly facing ledges of said corresponding STI structures and borders bounded by respective top surfaces of said corresponding STI structures;
• and
• a transistor including source/drain regions formed in said silicon layer and in said silicon substrate, a gate disposed over said silicon layer including over said opposed edges, and a channel region disposed beneath said gate, said channel region including a relatively higher concentration of channel dopant impurities in said silicon substrate and a relatively lower concentration of said channel dopant impurities in said silicon layer,
• wherein each of said silicon layer and said silicon substrate are comprised entirely of silicon.