Semiconductor device and related fabrication methods
AssigneeFreescale Semiconductor, Inc.
InventorsHongning Yang, Xin Lin, Jiang-Kai Zuo
Life of this patent
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Abstract
Semiconductor device structures and related fabrication methods are provided. An exemplary semiconductor device structure includes a first vertical drift region of semiconductor material, a second vertical drift region of semiconductor material, and a buried lateral drift region of semiconductor material that abuts the vertical drift regions. In one or more embodiments, the vertical drift regions and buried lateral drift region have the same conductivity type, wherein a body region of the opposite conductivity type overlies the buried lateral drift region between the vertical drift regions.
Claims18
A method of fabricating a transistor on an active region of semiconductor material having a first conductivity type, the method comprising:
- forming a buried lateral drift region of semiconductor material having a second conductivity type within the active region;
- forming a first vertical drift region of semiconductor material having the second conductivity type within the active region, wherein the first vertical drift region abuts the buried lateral drift region;
- forming a second vertical drift region of semiconductor material having the second conductivity type within the active region, wherein the second vertical drift region abuts the buried lateral drift region;
- forming a body region of semiconductor material overlying the buried lateral drift region between the first vertical drift region and the second vertical drift region;
- forming a gate structure overlying the first vertical drift region;
- and
- forming a drain region of semiconductor material within the second vertical drift region.
A method of fabricating a transistor on an active region of semiconductor material having a first conductivity type, the method comprising:
- forming a lateral drift region having the second conductivity type within the active region;
- forming a body region of semiconductor material having the first conductivity type within the lateral drift region, wherein a depth of the body region is less than a depth of the lateral drift region resulting in a buried lateral drift region underlying the body region;
- forming a first vertical drift region of semiconductor material having the second conductivity type within the active region, wherein the first vertical drift region abuts the buried lateral drift region;
- and
- forming a second vertical drift region of semiconductor material having the second conductivity type within the active region, wherein the second vertical drift region abuts the buried lateral drift region.
A method of fabricating a transistor on an active region of semiconductor material having a first conductivity type, the method comprising:
- forming a lateral drift region having a second conductivity type within the active region;
- forming a body region of semiconductor material having the first conductivity type within the lateral drift region, wherein a depth of the body region is less than a depth of the lateral drift region resulting in a buried lateral drift region underlying the body region;
- forming a first vertical drift region of semiconductor material having the second conductivity type within the active region, wherein the first vertical drift region abuts the buried lateral drift region;
- forming a second vertical drift region of semiconductor material having the second conductivity type within the active region, wherein the second vertical drift region abuts the buried lateral drift region;
- forming a gate structure overlying the first vertical drift region;
- and
- forming a source region of semiconductor material having the second conductivity type within the body region proximate the gate structure, wherein the gate structure overlies a portion of the body region disposed between the source region and the first vertical drift region.
A method of fabricating a transistor on an active region of semiconductor material having a first conductivity type, the method comprising:
- forming a buried lateral drift region of semiconductor material having a second conductivity type within the active region;
- forming a first vertical drift region of semiconductor material having the second conductivity type within the active region, wherein the first vertical drift region abuts the buried lateral drift region;
- forming a second vertical drift region of semiconductor material having the second conductivity type within the active region, wherein the second vertical drift region abuts the buried lateral drift region;
- forming a body region of semiconductor material having the first conductivity type within the active region overlying the buried lateral drift region;
- forming a gate structure overlying the first vertical drift region;
- and
- forming a source region of semiconductor material having the second conductivity type within the body region proximate the gate structure, wherein the gate structure overlies a portion of the body region disposed between the source region and the first vertical drift region.
Dependencies are inferred from the claim text.