Non-volatile memory device
AssigneeSamsung Electronics Co., Ltd.
InventorsSung-Il Chang, Young-Woo Park
Life of this patent
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Abstract
A non-volatile memory device includes a substrate having an active region defined by a device isolation region that has a trench and an air gap, a device isolation pattern positioned at a lower portion of the trench, a memory cell layer including a tunnel insulation layer, a trap insulation layer and a blocking insulation layer that are sequentially stacked on the active region and one of which extends from the active region toward the device isolation region encloses top of the air gap whose bottom is defined by a layer other than that of the top, and a control gate electrode positioned on the cell structure. The one of the insulation layer extending includes a recess at a region corresponding to the center of the air gap.
Claims15
A non-volatile memory device comprising:
- a substrate having an active region defined by a device isolation region, the device isolation region having a trench and an air gap, a sidewall of the trench being straight from a top to a bottom of the trench such that a width of the trench decreases with increasing depth;
- a device isolation pattern positioned at a lower portion of the trench such that the air gap is positioned at an upper portion of the trench conformal to the straight sidewall of the trench;
- a memory cell layer including insulation layers of a tunnel insulation layer, a trap insulation layer and a blocking insulation layer,
- wherein the insulation layers are sequentially stacked on the active region,
- wherein a top of the air gap is defined by at least one layer of the insulation layers and a bottom of the air gap is defined by a layer other than the at least one layer of the insulation layers,
- wherein the at least one layer defining the top of the air gap extends from the active region toward the device isolation region;
- and
- a control gate electrode positioned on the cell structure.
A non-volatile memory device comprising:
- a substrate;
- a first active region in the substrate;
- a second active region in the substrate;
- a memory cell layer formed on the first and second active regions having a tunnel insulation layer, a trap insulation layer and a blocking insulation layer that are sequentially stacked on the first and second active regions;
- and
- a trench including a device isolation pattern at a lower portion of the trench,
- wherein the trench is positioned between the first and second active regions in the substrate and includes an air gap at an upper portion of the trench,
- wherein a top of the air gap is defined by at least one layer of the insulation layers and a bottom of the air gap is defined by a layer other than the at least one layer of the insulation layers,
- wherein the at least one layer defining the top of the air gap extends from the active region toward the device isolation region.
Dependencies are inferred from the claim text.