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US 8,999,796 B2Granted
Manufacturing process of memory cells
AssigneeSTMicroelectronics (Rousset) SAS
InventorPhilippe Boivin
Life of this patent
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Abstract
A method for fabricating at least one cell of a semiconducting component includes positioning a first conducting polysilicon-type layer on a substrate, above an insulating oxide-type layer. The production of at least one trench within the first conducting layer is included to form two electrically unlinked distinct conducting parts intended to form two transistor gates of respectively two distinct twin cells.
Claims9
A method for fabricating an electrically programmable non-volatile memory type semiconductor component, the method comprising a production of a plurality of memory cells by at least:
- providing an insulating oxide layer on a substrate;
- positioning a first conductive polysilicon layer above the insulating oxide layer to define a U-shape notch orientated in a first direction to define a first zone and a second zone to manage and form the plurality of memory cells, respectively;
- and
- producing at least one trench within the first conductive polysilicon layer to form two electrically unlinked distinct conductive parts configured to define two transistor gates of respectively two distinct memory cells.
1 more element
Dependencies are inferred from the claim text.