Methods of manufacturing semiconductor device
AssigneeSK hynix Inc.
InventorSang Tae Ahn
Life of this patent
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Abstract
A method of manufacturing a semiconductor device includes forming first auxiliary patterns, alternately forming first material layers and second material layers on the sidewalls of the first auxiliary patterns so that a gap region between the first auxiliary patterns adjacent to each other is filled, removing the second material layers, and forming charge storage layers in respective regions from which the second material layers have been removed.
Claims15
A method of manufacturing a semiconductor device, the method comprising:
- forming first auxiliary patterns;
- alternately forming first material layers and second material layers on sidewalls of the first auxiliary patterns so that a gap region between the first auxiliary patterns adjacent to each other is filled;
- removing the second material layers;
- and
- forming charge storage layers in a nanowire form by filling the regions from which the second material layers have been removed with respective metal layers.
A method of manufacturing a semiconductor device, the method comprising:
- forming first auxiliary patterns;
- alternately forming first material layers and second material layers on sidewalls of the first auxiliary patterns so that a gap region between the first auxiliary patterns adjacent to each other is filled;
- removing the second material layers;
- and
- forming charge storage layers in a dot form including nanodots by filling the regions from which the second material layers have been removed with the nanodots.
A method of manufacturing a semiconductor device, the method comprising:
- forming first auxiliary patterns;
- alternately forming first material layers and second material layers on sidewalls of the first auxiliary patterns so that a gap region between the first auxiliary patterns adjacent to each other is filled;
- forming an interlayer insulating layer on the first material layers and the second material layers which have been alternately formed;
- forming second auxiliary patterns, disposed to cross the first auxiliary patterns, on the interlayer insulating layer;
- alternately forming third material layers and fourth material layers on sidewalls of the second auxiliary patterns so that a gap region between the second auxiliary patterns adjacent to each other is filled;
- removing the fourth material layers between the adjacent second auxiliary patterns;
- etching the interlayer insulating layer exposed by removing the fourth material layers;
- etching the second material layers exposed by etching the interlayer insulating layer;
- and
- forming charge storage layers in respective regions from which the second material layers have been etched.
Dependencies are inferred from the claim text.