Ionizing radiation blocking in IC chip to reduce soft errors
AssigneeInternational Business Machines Corporation
InventorsMukta G. Farooq, Ian D. Melville, Kevin S. Petrarca, Kenneth P. Rodbell
Life of this patent
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Abstract
Methods of blocking ionizing radiation to reduce soft errors and resulting IC chips are disclosed. One embodiment includes forming a front end of line (FEOL) for an integrated circuit (IC) chip; and forming at least one back end of line (BEOL) dielectric layer including ionizing radiation blocking material therein. Another embodiment includes forming a front end of line (FEOL) for an integrated circuit (IC) chip; and forming an ionizing radiation blocking layer positioned in a back end of line (BEOL) of the IC chip. The ionizing radiation blocking material or layer absorbs ionizing radiation and reduces soft errors within the IC chip.
Claims15
A method comprising:
- forming a first layer of an integrated circuit (IC) chip, the first layer including at least one of a transistor, resistor, capacitor or interconnecting wire;
- forming a first metallization layer over the first layer;
- forming at least one dielectric layer over the first metallization layer, the at least one dielectric layer including ionizing radiation blocking material therein, wherein the ionizing radiation blocking material is configured to block or absorb ionizing radiation, and wherein the ionizing radiation blocking material forms a substantially complete plane over the first layer,
- wherein the forming of the ionizing radiation blocking material includes:
- forming a conductor in a first dielectric layer;
- forming a second dielectric layer over the conductor;
- forming an ionizing radiation blocking film over the second dielectric layer;
- forming an opening through the ionizing radiation blocking film;
- filling the opening with a third dielectric layer;
- and
- forming a contact through the third dielectric layer to the conductor,
- wherein an inner edge of the ionizing radiation blocking film is distanced from an edge of the contact and the conductor laterally overlaps the opening;
- and
- forming an additional dielectric layer over the at least one dielectric layer,
- wherein the substantially complete plane formed by the ionizing radiation blocking material remains intact during the forming of the additional dielectric layer.
A method comprising:
- forming a first layer of an integrated circuit (IC) chip, the first layer including at least one of a transistor, resistor, capacitor or interconnecting wire;
- forming a second layer over the first layer of the IC chip, the second layer including an ionizing radiation blocking layer configured to block or absorb ionizing radiation, wherein the ionizing radiation blocking material forms a substantially complete plane over the first layer,
- wherein the ionizing radiation blocking layer forming includes:
- forming a conductor in a first dielectric layer;
- forming a second dielectric layer over the conductor;
- forming an ionizing radiation blocking film over the second dielectric layer;
- forming an opening through the ionizing radiation blocking film;
- filling the opening with a third dielectric layer;
- and
- forming a contact through the third dielectric layer to the conductor,
- wherein an inner edge of the ionizing radiation blocking film is distanced from an edge of the contact and the conductor laterally overlaps the opening,
- wherein the second layer forming includes forming the ionizing radiation blocking layer across more than one second layer, the ionizing radiation blocking layer being laterally discontinuous in any one second layer but forming the substantially complete plane in a vertical sense;
- and
- forming a dielectric layer over the second layer, wherein the substantially complete plane formed by the ionizing radiation blocking material remains intact during the forming of the dielectric layer.
Dependencies are inferred from the claim text.