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US 8,964,492 B2Granted
Tracking mechanism for writing to a memory cell
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsKuoyuan (Peter) Hsu, Bing Wang, Derek C. Tao, Yukit Tang, Kai Fan
Life of this patent
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Abstract
A circuit includes a tracking write circuit and a write circuit. Various write signals of the write circuit are generated based on tracking signals of the tracking write circuit. The write signals are used in a write operation of a memory cell.
Claims20
A circuit comprising:
- a clock signal line configured to have a clock signal thereon;
- a write driver;
- a data circuit;
- a memory cell;
- a tracking write buffer;
- a tracking write driver;
- and
- a tracking cell,
- wherein the circuit is configured so that during a write operation of the memory cell based on the clock signal
- the write driver circuit is configured to generate a write control signal on a write control line to control the memory cell;
- the data circuit is configured to provide write data to the memory cell on a write data line;
- the tracking write buffer is configured to generate a tracking write control signal on a tracking write control line to control the tracking cell;
- the tracking write driver is configured to generate a tracking write data signal on a tracking write data line to be transferred to the tracking cell;
- the data to be transferred to the tracking cell is transferred to the tracking cell based on a slower signal of the tracking write control signal and the tracking write data signal;
- and
- the tracking cell is configured to generate a tracking signal based on the data transferred to the tracking cell.
13 more elements
A method of writing to a memory cell comprising:
- based on a clock signal,
- generating a first edge of a write control signal on a write control line of the memory cell;
- generating a first edge of a write data signal on a write data line of the memory cell;
- generating a first edge of a tracking write control signal on a tracking write control line;
- and
- generating a first edge of a tracking write data signal on a tracking write data line;
- based on a slower signal of the tracking write control signal and the tracking write data signal,
- generating a reset signal;
- and
- based on the reset signal,
- generating a second edge of the write control signal;
- and
- generating a second edge of the write data signal,
- wherein
- a time delay of the tracking write control signal is greater than a time delay of the write control signal;
- and
- a time delay of the tracking write data signal is greater than a time delay of the write data signal.
14 more elements
A tracking circuit in a memory macro comprising:
- a clock generator circuit;
- a tracking cell;
- a tracking write buffer;
- a first plurality of memory cells;
- a tracking write control line coupled with the tracking cell, the tracking write buffer, and the first plurality of memory cells;
- a tracking write driver;
- a second plurality of memory cells;
- and
- a tracking write data line coupled with the tracking cell, the tracking write driver, and the second plurality of memory cells,
- wherein
- the clock generator circuit is configured to receive a first clock signal from outside of the memory macro, and, based on the first clock signal, generate a first edge of a second clock signal;
- the tracking write buffer, based on the first edge of the second clock signal, is configured to generate a first edge of a tracking write control signal on the tracking write control line;
- the tracking write driver, based on the first edge of the second clock signal, is configured to generate a first edge of a tracking write data signal on the tracking write data line;
- and
- the tracking cell is configured to be written with data represented by the tracking write data signal based on a slower signal of the tracking write control signal and the tracking write data signal.
12 more elements
Dependencies are inferred from the claim text.