Semiconductor device and method of forming patterned repassivation openings between RDL and UBM to reduce adverse effects of electro-migration

A method of making a semiconductor device, comprising:

• providing a semiconductor die;
• forming a redistribution layer over the semiconductor die, the redistribution layer including an interconnect formation area;
• forming a first insulating layer over the redistribution layer;
• forming a plurality of openings in the first insulating layer in the interconnect formation area while leaving a continuous portion of the first insulating layer extending across the interconnect formation area;
• forming an under bump metallization (UBM) layer over the openings in the first insulating layer in the interconnect formation area electrically connected to the redistribution layer;
• and
• forming a plurality of bumps over the semiconductor die, a first bump of the plurality of bumps covering the plurality of openings in the first insulating layer and covering the continuous portion of the first insulating layer within the interconnect formation area.

A method of making a semiconductor device, comprising:

• providing a semiconductor die;
• forming a first conductive layer over the semiconductor die, the first conductive layer including an interconnect formation area;
• forming a first insulating layer over the first conductive layer;
• forming a first opening and a second opening in the first insulating layer in the interconnect formation area of the first conductive layer;
• and
• forming a plurality of interconnect structures over the semiconductor die, wherein a first interconnect structure of the plurality of interconnect structures is disposed over the first and second openings in the first insulating layer in the interconnect formation area.

A semiconductor device, comprising:

• a semiconductor die;
• a first conductive layer formed over a surface of the semiconductor die;
• a first insulating layer formed over the first conductive layer;
• a plurality of openings formed in the first insulating layer in an interconnect formation area of the first conductive layer;
• and
• a discrete interconnect structure formed over the plurality of openings in the first insulating layer in the interconnect formation area electrically connected to the first conductive layer.