Image sensor for endoscopic use

An endoscope comprising:

• a lumen;
• an imaging sensor disposed within said endoscope comprising:
• a plurality of substrates comprising a first substrate and at least one second, subsequent supporting substrate;
• a pixel array;
• a plurality of interconnects;
• and
• a plurality of support circuits;
• wherein the first substrate of the plurality of substrates comprises the pixel array;
• wherein the plurality of supporting circuits are disposed on the at least one second, subsequent supporting substrate that is disposed remotely relative to said first substrate;
• wherein said plurality of supporting circuits are electrically connected to, and in electrical communication with, said pixel array via the plurality of interconnects disposed between said first substrate and said at least one second, subsequent supporting substrate;
• wherein said second, subsequent supporting substrate is disposed behind said pixel array relative to an object to be imaged;
• wherein said plurality of interconnects are spaced relative to one another at a distance that is greater than a pixel pitch of said pixel array.

An endoscopic device comprising:

• a lumen;
• an imaging sensor disposed near the distal tip of said lumen;
• wherein said imaging sensor comprises:
• a plurality of substrates comprising at least a first substrate and a second substrate;
• a pixel array located on the first substrate and comprising a plurality of pixel columns, wherein each of the plurality of pixel columns is defined as one pixel in width and a plurality of pixels in length enough to cover the dimension of the array;
• wherein said pixel columns are divided into pixel sub-columns such that each pixel sub-column is electrically isolated from other pixel sub-columns;
• a plurality of supporting circuits located on the second substrate and comprising a plurality of circuit columns, where one circuit column corresponds with one pixel sub-column, wherein each of the plurality of circuit columns is defined as having an area that corresponds with an area of a corresponding pixel sub-column;
• a plurality of buses, wherein there is one pixel sub-column bus per at least one pixel sub-column residing on the first substrate and one circuit column bus per circuit column residing on said second substrate;
• wherein at least a portion of each of the pixel sub-column buses is superimposed with at least a portion of each of the corresponding circuit column buses and at least one interconnect providing electrical communication between one pixel sub-column bus and one corresponding circuit column bus;
• and
• wherein said at least one interconnect is located anywhere between one pixel sub-column bus and one corresponding circuit column bus and are superimposed with respect to each other.