Compiling code for parallel processing architectures based on control flow
AssigneeTilera Corporation
InventorsWalter Lee, Robert A. Gottlieb, Vineet Soni, Anant Agarwal, Richard Schooler
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AssigneeTilera Corporation
InventorsWalter Lee, Robert A. Gottlieb, Vineet Soni, Anant Agarwal, Richard Schooler
Estimating the term…
A system comprises a plurality of computation units interconnected by an interconnection network. A method for configuring the system comprises forming subsets of instructions corresponding to different portions of a program, the subsets of instructions being related according to a control flow graph; for each of a first subset of branches in the control flow graph, scheduling a value of an associated branch condition to be broadcast to multiple computation units; for each of a second subset of branches in the control flow graph, representing each instruction dependent on an associated branch condition as a predicated instruction that includes a predicate for computing the associated branch condition; assigning each subset of instructions to one of the computation units for execution on the assigned computation unit; and converting at least some of the predicated instructions in a subset of instructions assigned to a given computation unit into unpredicated instructions that depend on a branch local to the given computation unit.
A method comprising:
A computer program product tangibly stored on a hardware computer readable medium, the computer program product for configuring a system comprising a plurality of computation units interconnected by an interconnection network for instruction level parallelism, the computer program product comprising instructions to cause a processor to:
A system comprises:
Dependencies are inferred from the claim text.