Layout design for electron-beam high volume manufacturing
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsHung-Chun Wang, Shao-Yun Fang, Tzu-Chin Lin, Wen-Chun Huang, Ru-Gun Liu
Life of this patent
Estimating the term…
Loading patent…
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsHung-Chun Wang, Shao-Yun Fang, Tzu-Chin Lin, Wen-Chun Huang, Ru-Gun Liu
Estimating the term…
The present disclosure relates to a method and apparatus to create a physical layout for electron-beam lithography, comprising defining a layout grid for a physical design, the layout grid further comprising vertical grid lines which coincide with stitching lines resulting from partitioning the physical design into a plurality of subfields. The physical design is assembled in accordance with design restrictions regarding interaction between design shapes and the layout grid. In some embodiments, the design restrictions are realized though layout restrictions. In some embodiments, the design restrictions are realized by shifting standard cells to minimize design shape interaction with the layout grid in a post-layout step. In some embodiments, the design restrictions are realized by exchanging positions between a plurality of standard cells for an exchange permutation which minimizes the number of interactions in a post-layout step. In some embodiments a routing grid is refined to rule out interactions between a subset of design constructs and the layout grid. Remaining design shape placement is then optimized along the routing grid relative to the stitching lines.
A method to create layout for electron-beam lithography, comprising:
A method to create a layout for patterning by an electron beam (e-beam) writing tool, comprising:
A tool arrangement configured to create a layout for electron-beam lithography, comprising:
Dependencies are inferred from the claim text.