Memory controller

A memory controller for controlling access to a semiconductor memory, comprising:

• an error correction unit configured to perform an error correction process in a plurality of error correction modes with different correcting capabilities for data stored in said semiconductor memory;
• a control unit configured to set an error correction mode for application to information data when said information data is stored in said semiconductor memory;
• and
• an interface configured to read said information data from and write said information data into said semiconductor memory, wherein
• said error correction unit includes:
• a syndrome calculation unit configured to calculate a syndrome with respect to said information data in accordance with said error correction mode set by said control unit;
• and
• a code data generation unit configured to generate code data with a fixed code length which is set commonly to said plurality of error correction modes, the code data including said information data, said syndrome which is calculated, and dummy data added thereto as needed,
• said interface writes said code data into said semiconductor memory, and
• said error correction unit further includes a correction processing unit configured to perform a correction process on said code data by using said syndrome included in said code data when said interface reads out said code data,
• said control unit stores a plurality of pieces of correction mode information duplicately into said code data, each piece of correction mode information specifying an error correction mode applied to the code data, and
• said control unit identifies, from said plurality of pieces of correction mode information, a particular error correction mode for application to said code data, when said control unit reads out said code data.