Obtaining power profile information with low overhead
AssigneeIntel Corporation
InventorRobert Knight
Life of this patent
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Abstract
In one embodiment, a method includes, upon occurrence of multiple power state transition events for a core of a multi-core processor, reading a value of a system counter of the core and values of low power counters of the core, without expiration of a timer or triggering of an interrupt. These values can be stored in a storage of the processor. Then, after collection is completed, the storage can be accessed to determine a power profile of the processor using the stored values. Other embodiments are described and claimed.
Claims19
A method comprising:
- registering a function of a device driver of a power profiler with an operating system (OS), the power profiler to be called when a power state transition event occurs in a processor of a system;
- allocating a buffer to store information related to the power state transition event;
- and
- on occurrence of the power state transition event as a trigger event for the power profiler, calling the function to:
- read a system counter value and a counter value of the processor for each of one or more low power states of the processor;
- and
- write the system counter value and the one or more counter values into the buffer to deterministically collect information during a profiling window, wherein the power profiler does not schedule an event to collect the information, such that the system counter value and the plurality of counter values are read without occurrence of an interrupt or a timer expiration.
An article comprising a non-transitory machine-accessible storage medium including instructions that when executed cause a system to:
- upon occurrence of each of a plurality of power state transition events of a first direction for a core of a multi-core processor and without scheduling an event for collection of information, call a function of a power profiler from a notification mechanism of an operating system to:
- read a value of a system counter of the core and values of each of a plurality of low power counters of the core to collect the information, without expiration of a timer or triggering of an interrupt that would cause the core to exit a low power state;
- and
- store the system counter value and the plurality of low power counter values in a storage of the multi-core processor;
- and
- after the plurality of power state transition events, access the storage to determine a power profile of the multi-core processor using the stored system counter values and the stored plurality of low power counter values.
A system comprising:
- a multi-core processor including a plurality of cores, each core of the plurality of cores including:
- a front end logic;
- an out-of-order logic;
- a backend logic;
- a time stamp counter to store a count of cycles;
- and
- a plurality of low power state counters, each of the plurality of low power state counters to count the cycles in which the core is in the corresponding low power state;
- and
- a power profiler having a device driver including a function, responsive to notification to the power profiler of a power state transition event, to:
- read the time stamp counter and the plurality of low power state counters for each of one or more low power states of the multi-core processor, without scheduling an event for collection of information that would cause the core to exit a low power state;
- and
- write the time stamp counter value and the plurality of low power state counter values into a buffer.
Dependencies are inferred from the claim text.