Loading patent…
AssigneeNVIDIA Corporation
InventorsDavid B. Glasco, Peter B. Holmqvist, George R. Lynch, Patrick R. Marchand, James Roberts, John H. Edmondson
Estimating the term…
A method for cleaning dirty data in an intermediate cache is disclosed. A dirty data notification, including a memory address and a data class, is transmitted by a level 2 (L2) cache to frame buffer logic when dirty data is stored in the L2 cache. The data classes may include evict first, evict normal and evict last. In one embodiment, data belonging to the evict first data class is raster operations data with little reuse potential. The frame buffer logic uses a notification sorter to organize dirty data notifications, where an entry in the notification sorter stores the DRAM bank page number, a first count of cache lines that have resident dirty data and a second count of cache lines that have resident evict_first dirty data associated with that DRAM bank. The frame buffer logic transmits dirty data associated with an entry when the first count reaches a threshold.
A method for cleaning dirty data resident in an intermediate cache that is coupled to one or more clients and to an external memory, the method comprising:
Frame buffer logic configured to clean dirty data resident in an intermediate cache that is coupled to one or more clients and to an external memory, by performing the steps of:
A computing device, comprising:
Dependencies are inferred from the claim text.