Data reception circuit, data reception apparatus, information processing system, and data reception method
AssigneeSony Corporation
InventorAtsuhiro Naka
Life of this patent
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Abstract
Disclosed herein is a data reception circuit including a clock generation block configured to divide a first clock based on clock information, the first clock being the clock of a transmission stream targeted to transmit video data between apparatuses, the clock information indicating a cyclical relationship between the first clock and a second clock serving as the clock of predetermined data, the clock generation block further outputting the divided clock as the second clock.
Claims20
A data reception circuit comprising,
- a clock generation block configured to divide a first clock based on clock information, said first clock being the clock of a transmission stream targeted to transmit video data between apparatuses, said clock information indicating a cyclical relationship between said first clock and a second clock serving as the clock of predetermined data, said clock generation block further outputting the divided clock as said second clock,
- wherein said transmission stream has said video data, said predetermined data, and said clock information multiplexed therein, said transmission stream being transmitted in synchronism with said first clock generated by amplifying by a predetermined scaling factor a clock for the transfer of said video data within an apparatus for transmitting said transmission stream;
- said data reception circuit further comprising a demultiplexing block configured to demultiplex said transmission stream having been transmitted into said video data, said predetermined data, and said clock information;
- said clock generation block generating said second clock by dividing said first clock based on the demultiplexed clock information.
A data reception apparatus comprising:
- a first clock generation block configured to generate a first clock as the clock of a transmission stream transmitted via a single transmission path from a transmission apparatus for transmitting video data to said data reception apparatus, said first clock being generated based on said transmission stream having been transmitted;
- a demultiplexing block configured to demultiplex said transmission stream having been transmitted into said video data, predetermined data, and clock information indicating a cyclical relationship between said first clock and a second clock serving as the clock of said predetermined data;
- and
- a clock generation block configured to divide the generated first clock based on the demultiplexed clock information, before outputting the divided clock as said second clock.
An information processing system comprising:
- a data transmission apparatus configured to generate clock information indicating a cyclical relationship between a first clock as the clock of a transmission stream targeted to transmit video data between apparatuses, and a second clock serving as the clock of predetermined data, before transmitting said transmission stream having said video data, said predetermined data, and said clock information multiplexed therein;
- and
- a data reception apparatus configured to receive said transmission stream having been transmitted and demultiplex the received transmission stream into said video data, said predetermined data, and said clock information, said data reception apparatus further dividing said first clock based on said clock information so as to generate said second clock.
A data reception method comprising,
- dividing a first clock based on clock information, said first clock being the clock of a transmission stream targeted to transmit video data between apparatuses, said clock information indicating a cyclical relationship between said first clock and a second clock serving as the clock of predetermined data;
- and
- outputting the divided clock as said second clock,
- wherein said transmission stream has said video data, said predetermined data, and said clock information multiplexed therein, said transmission stream being transmitted in synchronism with said first clock generated by amplifying by a predetermined scaling factor a clock for the transfer of said video data within an apparatus for transmitting said transmission stream;
- said data reception circuit further comprising a demultiplexing block configured to demultiplex said transmission stream having been transmitted into said video data, said predetermined data, and said clock information;
- said clock generation block generating said second clock by dividing said first clock based on the demultiplexed clock information.
Dependencies are inferred from the claim text.