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US 8,947,935 B2Granted
Integrated circuit and apparatuses including the same
AssigneeSamsung Electronics Co., Ltd.
InventorsEui-Seung Kim, Ji-Sung Kim
Life of this patent
Estimating the term…
Abstract
An integrated includes a memory cell, a bit line connected to the memory cell, a boosting circuit to boost the bit line up to a boosting voltage during a pre-charge operation pre-charging the bit line, and a regulation circuit connected between the bit line and an output terminal and determines a logic level of the output terminal according to the voltage of the bit line.
Claims18
An integrated circuit comprising:
- a memory cell;
- a bit line connected to the memory cell;
- a boosting circuit boosting the bit line to a boosting voltage during a pre-charge operation pre-charging the bit line;
- and
- a regulation circuit connected between the bit line and an output terminal and determines a logic level of the output terminal according to a voltage of the bit line,
- wherein the regulation circuit comprises a regulation transistor and an inverter, the output of the inverter connected to a gate of the regulation transistor.
3 more elements
An integrated circuit comprising:
- a first bit line connected to a memory cell;
- a first control circuit controlling a first pre-charge current provided to the first bit line according to a voltage of the first bit line during a pre-charge operation pre-charging the first bit line;
- a first boosting circuit to boost the first bit line to a first boosting voltage;
- and
- a detecting circuit detecting a state of the memory cell according to the result of a comparison between a first current related to the state of the memory cell and a second current related to a state of a reference memory cell during a sensing operation detecting the state of the memory cell, wherein the integrated circuit further comprises:
- a second bit line connected to the reference memory cell;
- a second control circuit controlling a second pre-charge current provided to the second bit line according to a voltage of the second bit line during the pre-charge operation pre-charging the second bit line;
- and
- a second boosting circuit to boost the second bit line to a second boosting voltage.
6 more elements
An integrated circuit, comprising:
- a bit line provide data to a memory cell;
- a boosting circuit to boost the bit line during a pre-charge operation pre-charging the bit line;
- and
- a regulation circuit connected between the bit line and an output terminal to determine a logic level of the output terminal according to a voltage level of the bit line, wherein the regulation circuit comprises a regulation transistor and an inverter, the output of the inverter connected to a gate of the regulation transistor.
1 more element
Dependencies are inferred from the claim text.