Multilayer capacitor

A multilayer capacitor comprising:

• an element body formed of dielectric ceramic;
• a plurality of internal electrodes disposed inside the element body such that the internal electrodes are stacked with ceramic layers sandwiched therebetween;
• and
• a pair of terminal electrodes provided on an outer surface of the element body and connected to the internal electrodes,
• wherein:
• a capacitor area which includes the plurality of internal electrodes and a suppression area for reducing electrostriction caused by the plurality of internal electrodes to suppress noise are formed,
• at least part of the suppression area is adjacent to the capacitor area,
• a thickness of the suppression area is determined according to an arrangement of the plurality of internal electrodes, the thickness being determined to satisfy the following expressions:
• α/β≦650
• α=We*n/d (We:
• electrode width, n:
• number of stacked electrodes, d:
• inter-electrode distance);
• and
• β=T/W (T:
• suppression area thickness, W:
• element body width),
• a marking for indicating a position of the capacitor area relative to the element body is provided on the outer surface of the element body, and
• the marking is formed by wiring out a plurality of marking internal electrodes to the outer surface at a portion where the paired terminal electrodes are not formed, the marking is integrated with ends of the plurality of marking internal electrodes exposed in the outer surface.