Method and apparatus for improving the signal integrity of high-speed serial data receivers using coupled inductors
AssigneePMC-Sierra, Inc.
InventorsVadim Milirud, Tomas Dusatko, Predrag Acimovic
Life of this patent
Estimating the term…
Abstract
Methods and apparatus improve the signal integrity of high-speed integrated circuits. Disclosed is a passive network for an input to a receiver. One embodiment of the passive network has two coupled inductors to improve both return loss and insertion loss characteristics. A shunt inductor is connected in series with the termination resistance, while a series inductor is placed in series between the pad and receiver circuitry. By exploiting deliberately-introduced mutual coupling between these two inductors, an area-efficient passive network is created that improves both the return loss and input bandwidth.
Claims21
An apparatus comprising:
- an integrated circuit assembly;
- an input pad disposed on the integrated circuit assembly, wherein the input pad is coupled to a first node;
- a primary electrostatic discharge (ESD) protection circuit of the integrated circuit assembly, wherein the primary ESD protection circuit is coupled to the first node;
- a shunt inductor having a first end and a second end, wherein the first end of the shunt inductor is directly coupled to the first node;
- a termination resistor with an end coupled to a second end of the shunt inductor;
- a secondary ESD protection circuit of the integrated circuit assembly, wherein the secondary ESD protection circuit is coupled to a second node;
- a receiver having an input coupled to the second node, wherein the receiver is configured to receive a serial data signal;
- a current-limiting resistor having a first end coupled to the second node and a second end coupled to a third node;
- and
- a series inductor having a first end and a second end, wherein the first end is coupled to the first node and wherein the second end is coupled to the third node.
An apparatus comprising:
- an integrated circuit assembly;
- an input pad disposed on the integrated circuit assembly, wherein the input pad is coupled to a first node;
- a primary electrostatic discharge (ESD) protection circuit of the integrated circuit assembly, wherein the primary ESD protection circuit is coupled to the first node;
- a termination resistor with an end coupled to the first node;
- a single secondary ESD protection circuit of the integrated circuit assembly, wherein the secondary ESD protection circuit is coupled to a second node;
- a receiver having an input coupled to the second node, wherein the receiver is configured to receive a serial data signal;
- a current-limiting resistor having a first end coupled to the second node and a second end coupled to a third node;
- and
- a single series inductor having a first end and a second end, wherein the first end is coupled to the first node and wherein the second end is coupled to the third node, wherein there are no other inductors between the first node and the second node than the single series inductor, wherein the first node is routed such that the primary ESD protection circuit is disposed in a signal path between the input pad and the first end of the series inductor.
Dependencies are inferred from the claim text.