Solid-state imaging device and electronic instrument
AssigneeSony Corporation
InventorsYasunori Sogoh, Hiroyuki Ohri
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Abstract
Disclosed herein is a solid-state imaging device including, a first semiconductor region of the first conduction type, a photoelectric conversion part having a second semiconductor region of the second conduction type formed in the region separated by the isolation dielectric region of the first semiconductor region, pixel transistors formed in the first semiconductor region, a floating diffusion region of the second conduction type which is formed in the region separated by the isolation dielectric region of the first semiconductor region, and an electrode formed on the first semiconductor region existing between the floating diffusion region and the isolation dielectric region and is given a prescribed bias voltage.
Claims18
A solid-state imaging device comprising:
- a first semiconductor region of a first conduction type;
- an isolation dielectric region that defines a pixel region in the first semiconductor region;
- a photoelectric conversion part having a second semiconductor region of a second conduction type in the first semiconductor region within the pixel region;
- a third semiconductor region of the first conduction type in the first semiconductor region and isolating a remainder of the first semiconductor region from the isolation dielectric region, the third semiconductor region having an impurity concentration that is different from that of the first semiconductor region, the third semiconductor region and the second semiconductor region being non-overlapping in plan view;
- pixel transistors in the first semiconductor region;
- a floating diffusion region of the second conduction type in the first semiconductor region within the pixel region;
- and
- an electrode over the first semiconductor region, in plan view, said electrode having a portion between said floating diffusion region and said isolation dielectric region.
A process for producing a solid-state imaging device, said process comprising:
- forming, by at least one semiconductor manufacturing apparatus, on a semiconductor substrate, a first semiconductor region of a first conduction type and an isolation dielectric region, said isolation dielectric region defining a pixel region in the first semiconductor region;
- forming, by the at least one semiconductor manufacturing apparatus, a photoelectric conversion part having a second semiconductor region of a second conduction type in the first semiconductor region within the pixel region, and forming a floating diffusion region of the second conduction type in the first semiconductor region within the pixel region;
- and
- forming, by the at least one semiconductor manufacturing apparatus, a pixel transistor having a gate electrode over said first semiconductor region, and forming an electrode to be applied with a prescribed bias voltage, the electrode having a portion that is disposed on said first semiconductor region between said floating diffusion region and said isolation dielectric region,
- wherein,
- a third semiconductor region of the first conduction type is in the first semiconductor region and isolating a remainder of the first semiconductor region from the isolation dielectric region, the third semiconductor region having a higher impurity concentration than the first semiconductor region, the third semiconductor region and the second semiconductor region being non-overlapping in plan view.
A solid-state imaging device comprising:
- a first semiconductor region of a first conduction type;
- an isolation dielectric region that defines a pixel region in the first semiconductor region;
- a photoelectric conversion part having a second semiconductor region of a second conduction type in the first semiconductor region within the pixel region;
- a third semiconductor region of the first conduction type in the first semiconductor region and isolating a remainder of the first semiconductor region from the isolation dielectric region, the third semiconductor region having an impurity concentration that is different from that of the first semiconductor region, the third semiconductor region and the second semiconductor region being non-overlapping in plan view;
- pixel transistors in said first semiconductor region;
- a floating diffusion region of the second conduction type in the first semiconductor region within the pixel region;
- and
- an insulating film with negative fixed charges on said first semiconductor region, said insulating film having a portion between said floating diffusion region and said isolation dielectric region.
A process for producing a solid-state imaging device, said process comprising:
- forming, by at least one semiconductor manufacturing apparatus, on a semiconductor substrate, a first semiconductor region of a first conduction type and an isolation dielectric region, said isolation dielectric region defining a pixel region in the first semiconductor region;
- forming, by the at least one semiconductor manufacturing apparatus, a photoelectric conversion part having a second semiconductor region of a second conduction type in the first semiconductor region within the pixel region, and forming a floating diffusion region of the second conduction type in the first semiconductor region within the pixel region;
- and
- forming, by the at least one semiconductor manufacturing apparatus, a pixel transistor having a gate electrode on said first semiconductor region;
- and
- forming, by the at least one semiconductor manufacturing apparatus, an insulating film with negative fixed charges on said first semiconductor region between said floating diffusion region and said isolation dielectric region,
- wherein,
- a third semiconductor region of the first conduction type is in the first semiconductor region and isolating a remainder of the first semiconductor region from the isolation dielectric region, the third semiconductor region having a higher impurity concentration than the first semiconductor region, the third semiconductor region and the second semiconductor region being non-overlapping in plan view.
An electronic instrument comprising:
- a solid-state imaging device;
- an optical system to lead incident light to said solid-state imaging device;
- and
- a signal processing circuit to process output signals from said solid-state imaging device, wherein,
- said solid-state imaging device includes:
- a first semiconductor region of a first conduction type,
- an isolation dielectric region that defines a pixel region in the first semiconductor region,
- a photoelectric conversion part having a second semiconductor region of a second conduction type in the first semiconductor region within the pixel region,
- a third semiconductor region of the first conduction type in the first semiconductor region and isolating a remainder of the first semiconductor region from the isolation dielectric region, the third semiconductor region having an impurity concentration that is different from that of the first semiconductor region, the third semiconductor region and the second semiconductor region being non-overlapping in plan view;
- pixel transistors in the first semiconductor region,
- a floating diffusion region of the second conduction type in the first semiconductor region within the pixel region, and
- an electrode on the first semiconductor region, in plan view, said electrode having a portion between said floating diffusion region and said isolation dielectric region.
An electronic instrument comprising:
- a solid-state imaging device;
- an optical system to lead incident light to said solid-state imaging device;
- and
- a signal processing circuit to process output signals from said solid-state imaging device, wherein,
- said solid-state imaging device includes:
- a first semiconductor region of a first conduction type,
- an isolation dielectric region that defines a pixel region in the first semiconductor region,
- a photoelectric conversion part having a second semiconductor region of a second conduction type in the first semiconductor region within the pixel region,
- a third semiconductor region of the first conduction type in the first semiconductor region and isolating a remainder of the first semiconductor region from the isolation dielectric region, the third semiconductor region having an impurity concentration that is different from that of the first semiconductor region, the third semiconductor region and the second semiconductor region being non-overlapping in plan view,
- pixel transistors in said first semiconductor region,
- a floating diffusion region of the second conduction type in the first semiconductor region within the pixel region, and
- an insulating film with negative fixed charges on said first semiconductor region, said insulating film having a portion between said floating diffusion region and said isolation dielectric region.
Dependencies are inferred from the claim text.