Solid-state imaging apparatus and manufacturing method of solid-state imaging apparatus
AssigneeCanon Kabushiki Kaisha
InventorsMasahiro Kobayashi, Mineo Shimotsusa
Life of this patent
Estimating the term…
Abstract
The first face of the pad is situated between the front-side face of the second semiconductor substrate and a hypothetical plane including and being parallel to the front-side face, and a second face of the pad that is a face on the opposite side of the first face is situated between the first face and the front-side face of the second semiconductor substrate, and wherein the second face is connected to the wiring structure so that the pad is electrically connected to the circuit arranged in the front-side face of the second semiconductor substrate via the wiring structure.
Claims16
A solid-state imaging apparatus comprising:
- a first semiconductor substrate;
- a second semiconductor substrate, wherein a front-side face of the first semiconductor substrate and the front-side face of the second semiconductor substrate face to each other;
- a wiring structure arranged between the first semiconductor substrate and the second semiconductor substrate;
- and
- a pad which is one of a plurality of pads to which a voltage is input from an exterior of the solid-state imaging apparatus, or from which a signal is output to an exterior of the solid-state imaging apparatus,
- wherein a first face of the pad is situated between the front-side face of the second semiconductor substrate and a hypothetical plane including and being parallel to the front-side face of the first semiconductor substrate, and a second face of the pad that is a face on the opposite side of the first face is situated between the first face and the front-side face of the second semiconductor substrate, and
- wherein one of the first and second semiconductor substrates includes a photoelectric conversion element, and the other of the first and second semiconductor substrates includes a semiconductor integrated circuit, and the second face is connected to a plurality of vias of one layer included in the wiring structure so that the pad is electrically connected to the semiconductor integrated circuit through the wiring structure.
Dependencies are inferred from the claim text.