Method for reducing aliasing in TDI based imaging

A wafer inspection system configured for suppressing aliasing when detecting defects in wafers used to manufacture integrated circuits, comprising:

• a wafer conveyor configured to translate a wafer across a field of view at a scan rate in a scan direction to create a scanned image of the wafer;
• imaging optics configured to magnify and focus the scanned image;
• a time integration delay sensor comprising one or more sensor elements arranged in a matrix of columns and rows extending along one or more sensor directions, the matrix including a set of columns and a set of rows, the time integration delay sensor configured to:
• acquire image data from the magnified and focused scanned image with the sensor matrix at a selected sample clock rate;
• sum the image data across the set of rows of the sensor matrix in order to generate integrated image data;
• generate a pixilated image of the wafer from the integrated image data, wherein each pixel corresponds to a physical region of the wafer;
• an image processor operative for analyzing the pixilated image to detect defects in the wafer;
• and
• an anti-aliasing system configured to mitigate aliasing in the pixilated image in a cross-scan direction by altering alignment of the scan direction with respect to the sensor direction to blur the image data in the cross-scan direction, the cross-scan direction being orthogonal to the scan direction.

A method for suppressing aliasing in wafers inspection system, comprising the step of:

• conveying a wafer across a field of view of a sensor matrix at a scan rate in a scan direction to create a scanned image of the wafer;
• magnifying and focusing the scanned image;
• acquiring image from the magnified and focused scanned image with the sensor matrix in a sensor direction at a sample clock rate;
• summing the image data across rows of the sensor matrix in order to generate integrated image data;
• creating a pixilated image of the wafer from the integrated image data, wherein each pixel corresponds to a physical region of the wafer;
• desynchronizing the scan rate from the sample clock rate to blur the image data in the scan direction in order to mitigate aliasing in the pixilated image in the scan direction by;
• and
• analyzing the pixilated image to detect defects in the wafer.

A method for suppressing aliasing in a time delay integration inspection system, comprising the step of:

• conveying a subject to be imaged across a field of view of a sensor matrix at a scan rate in a scan direction to create a scanned image of the subject;
• magnifying and focusing the scanned image;
• acquiring image data from the magnified and focused scanned image with the sensor matrix in a sensor direction at a sample clock rate;
• summing the image data across a set of rows of a sensor matrix in order to generate integrated image data;
• creating a pixilated image of the subject from the integrated image data, wherein each pixel corresponds to a physical region of the subject;
• altering alignment of the scan direction with respect to the sensor direction to blur the image data in the cross-scan direction in order to mitigate aliasing in the pixilated image in a cross-scan direction orthogonal to the scan direction;
• and
• analyzing the pixilated image to detect defects in the subject.