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US 8,947,279 B2Granted
Delta/sigma modulator
AssigneeKabushiki Kaisha Toshiba
InventorsDaiki Ono, Jun Deguchi
Life of this patent
Estimating the term…
Abstract
According to one embodiment, a delta/sigma modulator includes a first multiplier based on a reference capacitor having capacitance CR and a first variable capacitor having capacitance CS1 according to a distance between electrodes thereof, the first multiplier being defined by a first multiplier factor given by CR/CS1 and being supplied with a reference voltage, a second multiplier based on a second variable capacitor having capacitance CS2 and a third variable capacitor having capacitance CS3, the second multiplier being defined by a second multiplier factor given by CS3/CS2 and being provided in a feedback path, and an adder configured to add an output of the first multiplier and an output of the second multiplier, wherein CS1, CS2 and CS3 are the same.
Claims20
A delta/sigma modulator comprising:
- a first multiplier based on a reference capacitor having capacitance CR and a first variable capacitor having first variable capacitance CS1 according to a distance between electrodes thereof, the first multiplier being defined by a first multiplier factor given by CR/CS1 and being supplied with a reference voltage;
- a second multiplier based on a second variable capacitor having second variable capacitance CS2 and a third variable capacitor having third variable capacitance CS3, the second multiplier being defined by a second multiplier factor given by CS3/CS2 and being provided in a feedback path;
- and
- an adder configured to add an output of the first multiplier and an output of the second multiplier, wherein
- the first variable capacitance CS1, the second variable capacitance CS2, and the third variable capacitance CS3 are the same.
2 more elements
A delta/sigma modulator comprising:
- a first multiplier based on a reference capacitor having capacitance CR and a first variable capacitor having first variable capacitance CS1 according to a distance between electrodes thereof, the first multiplier being defined by a first multiplier factor given by CR/CS1 and being supplied with a reference voltage;
- a second multiplier based on a second variable capacitor having second variable capacitance CS2 and a third variable capacitor having third variable capacitance CS3, the second multiplier being defined by a second multiplier factor given by CS3/CS2 and being provided in a feedback path;
- an adder configured to add an output of the first multiplier and an output of the second multiplier;
- an integrator coupled to an output of the adder;
- a comparator coupled to an output of the integrator;
- and
- a delay element provided in a feedback path and coupled between an output of the comparator and an input of the second multiplier, wherein
- the first variable capacitance CS1, the second variable capacitance CS2, and the third variable capacitance CS3 are the same.
5 more elements
A delta/sigma modulator comprising:
- a first multiplier based on a reference capacitor having capacitance CR and a first variable capacitor having first variable capacitance CS1 according to a distance between electrodes thereof, the first multiplier being defined by a first multiplier factor given by CR/CS1 and being supplied with a reference voltage;
- a second multiplier based on a second variable capacitor having second variable capacitance CS2 and a third variable capacitor having third variable capacitance CS3, the second multiplier being defined by a second multiplier factor given by CS3/CS2 and being provided in a feedback path;
- a first adder configured to add an output of the first multiplier and an output of the second multiplier;
- a first integrator coupled to an output of the first adder;
- a third multiplier coupled to an output of the first integrator and defined by a multiplier factor 1;
- a fourth multiplier provided in a branch path of the feedback path and defined by a multiplier factor 1;
- a second adder configured to add an output of the third multiplier and an output of the fourth multiplier;
- a second integrator coupled to an output of the second adder;
- a comparator coupled to an output of the second integrator;
- and
- a delay element provided in the feedback path, coupled between an output of the comparator and an input of the second multiplier, and coupled between the output of the comparator and an input of the fourth multiplier, wherein
- the first variable capacitance CS1, the second variable capacitance CS2, and the third variable capacitance CS3 are the same.
9 more elements
A delta/sigma modulator comprising:
- a first multiplier based on a reference capacitor having capacitance CR and a first variable capacitor having first variable capacitance CS1 according to a distance between electrodes thereof, the first multiplier being defined by a first multiplier factor given by CR/CS1 and being supplied with a reference voltage;
- a second multiplier based on a second variable capacitor having second variable capacitance CS2 and a third variable capacitor having third variable capacitance CS3, the second multiplier being defined by a second multiplier factor given by CS3/CS2 and provided in a feedback path;
- a first adder configured to add an output of the first multiplier and an output of the second multiplier;
- a first integrator coupled to an output of the first adder;
- a third multiplier coupled to an output of the first integrator and defined by a multiplier factor 1;
- a fourth multiplier provided in a first branch path of the feedback path and defined by a multiplier factor 1;
- a second adder configured to add an output of the third multiplier and an output of the fourth multiplier;
- a second integrator coupled to an output of the second adder;
- a fifth multiplier coupled to an output of the second integrator and defined by a multiplier factor 1;
- a sixth multiplier provided in a second branch path of the feedback path and defined by a multiplier factor 1;
- a third adder configured to add an output of the fifth multiplier and an output of the sixth multiplier;
- a third integrator coupled to an output of the third adder;
- a comparator coupled to an output of the third integrator;
- and
- a delay element provided in the feedback path, coupled between an output of the comparator and an input of the second multiplier, coupled between the output of the comparator and an input of the fourth multiplier, and coupled between the output of the comparator and an input of the sixth multiplier, wherein
- the first variable capacitance CS1, the second variable capacitance CS2, and the third variable capacitance CS3 are the same.
13 more elements
Dependencies are inferred from the claim text.