Multi-channel sample-and-hold circuit and analog-to-digital converter using the same

A sample-and-hold circuit comprising:

• an operational amplifier configured to have M input terminals and one output terminal and to output a result signal to an analog-to-digital converter;
• a feedback capacitor connected between the input terminals and the output terminal of the operational amplifier to form a feedback path;
• N sampling capacitor blocks, each connected to one of N channels, the N sampling capacitor blocks each configured to sample an analog signal input to a respective one of the N channels and store the analog signal in a respective sampling capacitor therein;
• a controller connected between output terminals of at least two of the N sampling capacitor blocks and one of the input terminals of the operational amplifier, the controller configured to input each of the analog signals held at the respective sampling capacitors to a respective one of the M input terminals of the operational amplifier in response to hold control signals;
• and
• M reset switches, each reset switch connected between a reference voltage source and the respective input terminals of the operational amplifier, the M reset switches configured to reset the output terminal of the operational amplifier if the operational amplifier does not perform a holding operation, the M reset switches configured to reset input terminals not used in the holding operation of the operational amplifier in response to a group reset control signal,
• wherein M is less than N, and M is a natural number greater than 1.

A sample-and-hold circuit comprising:

• an operational amplifier having an input terminal and an output terminal electrically coupled to form a feedback loop;
• a plurality of sampling blocks configured to simultaneously sample and hold respective analog signals input from respective channels at respective sampling capacitors therein;
• and
• a plurality of switching units configured to sequentially couple a respective one of the plurality of sampling blocks to the operational amplifier to sequentially provide the operational amplifier with one of the analog signals held at the sampling capacitor of the respective one of the plurality of sampling blocks.