Reference voltage generation circuit

A reference voltage generation circuit mounted on a semiconductor device, for generating a reference voltage,

• the reference voltage generation circuit comprising a plurality of unit reference voltage generation circuits connected in parallel,
• each of the unit reference voltage generation circuits comprising:
• a current output circuit for generating a current, the current output circuit comprising a depletion type NMOS transistor, which includes a gate electrode having N-type conductivity and includes a source connected to have a potential higher than a potential of the gate;
• an enhancement type NMOS transistor, which includes a gate electrode having P-type conductivity and is diode-connected in series to the current output circuit, the enhancement type NMOS transistor having the same channel impurity profile as a channel impurity profile of the depletion type NMOS transistor;
• a first current interruption circuit for interrupting a current, which is connected in series to the current output circuit and the enhancement type NMOS transistor;
• and
• a second current interruption circuit provided between a drain of the enhancement type NMOS transistor and a reference voltage terminal,
• the plurality of unit reference voltage generation circuits having different channel impurity profiles.

A reference voltage generation circuit mounted on a semiconductor device, for generating a reference voltage,

• the reference voltage generation circuit comprising a plurality of unit reference voltage generation circuits connected in parallel,
• each of the unit reference voltage generation circuits comprising:
• a constant current circuit for generating a constant current, the constant current circuit comprising a depletion type NMOS transistor, which includes a gate electrode having N-type conductivity and includes a gate and a source connected to each other;
• an enhancement type NMOS transistor, which includes a gate electrode having P-type conductivity and is diode-connected in series to the constant current circuit, the enhancement type NMOS transistor having the same channel impurity profile as a channel impurity profile of the depletion type NMOS transistor;
• and
• a first current interruption circuit for interrupting a current, which is connected in series to the constant current circuit and the enhancement type NMOS transistor,
• the plurality of unit reference voltage generation circuits having different channel impurity profiles.