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US 8,947,158 B2Granted
Semiconductor device and electronic device
AssigneeSemiconductor Energy Laboratory Co., Ltd.
InventorKazunori Watanabe
Life of this patent
Estimating the term…
Abstract
To reduce a variation in the electrical characteristics of a transistor. A potential generated by a voltage converter circuit is applied to a back gate of a transistor included in a voltage conversion block. Since the back gate of the transistor is not in a floating state, a current flowing through the back channel can be controlled so as to reduce a variation in the electrical characteristics of the transistor. Further, a transistor with low off-state current is used as the transistor included in the voltage conversion block, whereby storage of the output potential is controlled.
Claims18
A semiconductor device comprising:
- a voltage converter circuit comprising:
- a first transistor;
- a second transistor;
- a third transistor;
- a first capacitor;
- and
- a second capacitor,
- wherein the first transistor comprises a channel formation region comprising silicon,
- wherein the third transistor comprises a channel formation region comprising an oxide semiconductor,
- wherein one of a source and a drain of the first transistor is electrically connected to a gate of the first transistor,
- wherein one of a source and a drain of the second transistor is electrically connected to a gate of the second transistor,
- wherein one of a source and a drain of the third transistor is electrically connected to a gate of the third transistor,
- wherein the one of the source and the drain of the first transistor is electrically connected to a first terminal of the first capacitor,
- wherein the one of the source and the drain of the second transistor is electrically connected to a first terminal of the second capacitor,
- wherein the one of the source and the drain of the first transistor is electrically connected to the other of the source and the drain of the second transistor,
- wherein the one of the source and the drain of the second transistor is electrically connected to the other of the source and the drain of the third transistor, and
- wherein the third transistor comprises a back gate electrically connected to the one of the source and the drain of the third transistor.
14 more elements
A semiconductor device comprising:
- a voltage converter circuit comprising:
- a first transistor;
- a second transistor;
- a third transistor;
- a first capacitor;
- and
- a second capacitor,
- wherein the first transistor comprises a channel formation region comprising an oxide semiconductor,
- wherein the third transistor comprises a channel formation region comprising silicon,
- wherein one of a source and a drain of the first transistor is electrically connected to a gate of the first transistor,
- wherein one of a source and a drain of the second transistor is electrically connected to a gate of the second transistor,
- wherein one of a source and a drain of the third transistor is electrically connected to a gate of the third transistor,
- wherein the one of the source and the drain of the first transistor is electrically connected to a first terminal of the first capacitor,
- wherein the one of the source and the drain of the second transistor is electrically connected to a first terminal of the second capacitor,
- wherein the one of the source and the drain of the first transistor is electrically connected to the other of the source and the drain of the second transistor,
- wherein the one of the source and the drain of the second transistor is electrically connected to the other of the source and the drain of the third transistor, and
- wherein the third transistor comprises a back gate electrically connected to the one of the source and the drain of the third transistor.
14 more elements
A semiconductor device comprising:
- a power source circuit comprising a first voltage converter circuit and a second voltage converter circuit;
- an oscillator configured to output a clock signal to the power source circuit;
- and
- a CPU core configured to control whether an operation of the oscillator is stopped or not,
- wherein each of the first voltage converter circuit and the second voltage converter circuit comprises a first transistor, a second transistor, a third transistor, a first capacitor, a second capacitor and an output terminal,
- wherein, in each of the first voltage converter circuit and the second voltage converter circuit, one of a source and a drain of the first transistor is electrically connected to a gate of the first transistor,
- wherein, in each of the first voltage converter circuit and the second voltage converter circuit, one of a source and a drain of the second transistor is electrically connected to a gate of the second transistor,
- wherein, in each of the first voltage converter circuit and the second voltage converter circuit, one of a source and a drain of the third transistor is electrically connected to a gate of the third transistor,
- wherein, in each of the first voltage converter circuit and the second voltage converter circuit, the one of the source and the drain of the first transistor is electrically connected to a first terminal of the first capacitor,
- wherein, in each of the first voltage converter circuit and the second voltage converter circuit, the one of the source and the drain of the second transistor is electrically connected to a first terminal of the second capacitor,
- wherein, in each of the first voltage converter circuit and the second voltage converter circuit, the one of the source and the drain of the first transistor is electrically connected to the other of the source and the drain of the second transistor,
- wherein, in each of the first voltage converter circuit and the second voltage converter circuit, the one of the source and the drain of the second transistor is electrically connected to the other of the source and the drain of the third transistor,
- wherein, in each of the first voltage converter circuit and the second voltage converter circuit, at least one of the first transistor and the second transistor comprises a back gate electrically connected to the one of the source and the drain of the third transistor,
- wherein the one of the source and the drain of the third transistor of the first voltage converter circuit is electrically connected to the output terminal,
- wherein the other of the source and the drain of the first transistor of the second voltage converter circuit is electrically connected to the output terminal,
- wherein the first voltage converter circuit is configured to generate a first potential which is a negative potential,
- wherein the second voltage converter circuit is configured to generate a second potential which is a positive potential,
- wherein the CPU core comprises a register,
- wherein the register comprises a first memory circuit configured to store data in a period during which a power source voltage is applied to the CPU core, and a second memory circuit configured to store data in a period during which supply of the power source voltage to the CPU core is stopped,
- wherein the second memory circuit comprises a transistor for controlling writing and storage of data, and
- wherein the CPU core is further configured to control whether the first potential or the second potential is applied to a back gate of the transistor for controlling writing and storage of data.
18 more elements
Dependencies are inferred from the claim text.