Phase adjustment circuit and interface circuit

An interface circuit comprising:

• a first phase adjuster including a plurality of parallel-connected first inverters configured to receive an input signal to be phase-adjusted, the first inverters being activated or deactivated depending on first control signals;
• a delay circuit configured to delay the input signal to be phase-adjusted by a predetermined delay time;
• a second phase adjuster including a plurality of parallel-connected second inverters configured to receive the delayed signal from the delay circuit, the second inverters being activated or deactivated depending on second control signals;
• an output circuit configured to receive output signals of the first and second phase adjusters and output a signal whose phase is adjusted within a range of the delay time;
• and
• a phase adjustment control unit configured to output the first control signals and the second control signals according to a control signal input,
• wherein the second phase adjuster further includes:
• a phase adjustment circuit which includes transistors that are connected to the plurality of second inverters and controlled by the input signal so as to block a current path between the first phase adjuster and the second phase adjuster during the delay time, and
• a control signal generation circuit configured to generate the control signal and supply the control signal to the phase adjustment control unit.