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US 8,947,121 B2Granted
Programmable logic device
AssigneeSemiconductor Energy Laboratory Co., Ltd.
InventorYoshiyuki Kurokawa
Life of this patent
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Abstract
A programmable logic device that verifies whether configuration data is stored correctly is provided. The programmable logic device includes a configuration memory storing configuration data input to a first wiring and a switch controlling conduction or non-conduction between a second wiring and a third wiring in accordance with the configuration data stored in the configuration memory. Further, whether the configuration data input to the first wiring agrees with configuration data actually stored in the configuration memory is verified by comparing the potential of the second wiring with the configuration data input to the first wiring.
Claims20
A programmable logic device comprising:
- a switch comprising an input terminal and an output terminal;
- a first logic element comprising an output terminal;
- a second logic element comprising an input terminal;
- a read circuit;
- and
- a bit line,
- wherein the output terminal of the first logic element is electrically connected to the input terminal of the switch,
- wherein the output terminal of the switch is electrically connected to the input terminal of the second logic element,
- wherein the bit line is configured to supply configuration data to the switch,
- wherein the switch is configured to control conduction between the input terminal of the switch and the output terminal of the switch in accordance with first data stored in the switch,
- wherein the read circuit is configured to compare the configuration data and second data, and
- wherein the second data is supplied from the input terminal of the switch and corresponds to the first data.
9 more elements
A programmable logic device comprising:
- a switch comprising a first transistor, a second transistor, an input terminal, and an output terminal;
- a first logic element comprising an output terminal;
- a second logic element comprising an input terminal;
- a read circuit;
- and
- a bit line,
- wherein a first terminal of the first transistor is electrically connected to the bit line,
- wherein a second terminal of the first transistor is electrically connected to a gate of the second transistor,
- wherein a first terminal of the second transistor is electrically connected to the input terminal of the switch,
- wherein a second terminal of the second transistor is electrically connected to the output terminal of the switch,
- wherein the output terminal of the first logic element is electrically connected to the input terminal of the switch,
- wherein the output terminal of the switch is electrically connected to the input terminal of the second logic element,
- wherein the bit line is configured to supply configuration data to the switch,
- wherein the switch is configured to control conduction between the input terminal of the switch and the output terminal of the switch in accordance with first data stored in the switch,
- wherein the read circuit is configured to compare the configuration data and second data, and
- wherein the second data is supplied from the input terminal of the switch and corresponds to the first data.
13 more elements
A programmable logic device comprising:
- a switch comprising a first transistor, a second transistor, a first inverter circuit, a second inverter circuit, an input terminal, and an output terminal;
- a first logic element comprising an output terminal;
- a second logic element comprising an input terminal;
- a read circuit;
- and
- a bit line,
- wherein a first terminal of the first transistor is electrically connected to the bit line,
- wherein a second terminal of the first transistor is electrically connected to a gate of the second transistor,
- wherein a first terminal of the second transistor is electrically connected to the input terminal of the switch,
- wherein a second terminal of the second transistor is electrically connected to the output terminal of the switch,
- wherein an input terminal of the first inverter circuit is electrically connected to the gate of the second transistor and an output terminal of the second inverter circuit,
- wherein an output terminal of the first inverter circuit is electrically connected to an input terminal of the second inverter circuit,
- wherein the output terminal of the first logic element is electrically connected to the input terminal of the switch,
- wherein the output terminal of the switch is electrically connected to the input terminal of the second logic element,
- wherein the bit line is configured to supply configuration data to the switch,
- wherein the switch is configured to control conduction between the input terminal of the switch and the output terminal of the switch in accordance with first data stored in the switch,
- wherein the read circuit is configured to compare the configuration data and second data, and
- wherein the second data is supplied from the input terminal of the switch and corresponds to the first data.
15 more elements
Dependencies are inferred from the claim text.