Charge-discharge control circuit, semiconductor integrated circuit, method of controlling charging and discharging

A semiconductor integrated circuit for controlling cycles of charging and discharging of a secondary battery including plural cells, comprising:

• a cell balance detection circuit that detects that a voltage of at least one of the plural cells reaches a predetermined voltage in a first charging operation;
• a memory circuit that memorizes a first cell that reaches the predetermined voltage first among the plural cells in the first charging operation;
• and
• a control circuit that controls switch units of bypass circuits, each of the bypass circuits including the switch unit for bypassing the current that flows through the corresponding cell when charging;
• wherein the control circuit controls, in a second charging operation after the secondary battery charged by the first charging operation is discharged, the switch unit corresponding to the first cell memorized by the memory circuit so that the switch unit corresponding to the first cell is switched on from a start to an end of the second charging operation.

A method of controlling charging and discharging by a charge-discharge control circuit that controls cycles of charging and discharging of a secondary battery including plural cells, comprising:

• a cell balance detecting step of detecting that a voltage of at least one of the plural cells reaches a predetermined voltage in a first charging operation;
• a memorizing step of memorizing a first cell in a memory circuit that reaches the predetermined voltage first among the plural cells in the first charging operation;
• and
• a controlling step of controlling switch units of bypass circuits, each of the bypass circuits including the switch unit for bypassing the current that flows through the corresponding cell when charging;
• wherein in the controlling step, in a second charging operation after the secondary battery charged by the first charging operation is discharged, the switch unit corresponding to the first cell memorized in the memorizing is controlled so that the switch unit corresponding to the first cell is switched on from a start to an end of the second charging operation.