Methods for forming bipolar transistors

A method of forming a bipolar device, comprising:

• forming a first region of a first conductivity type extending to a surface of the bipolar device;
• forming a second region of the first conductivity type spaced apart from and underlying an entirety of the first region;
• forming a third region of a second, opposite, conductivity type having a first part between the first and second regions and surrounding the first region, a second part below a first portion of the second region, a first central portion between the first and second parts, and a second central portion positioned above the first central portion and extending to the surface of the bipolar device from the first central portion, wherein the first part, the second part, the first central portion, and the second central portion are continuously coupled, and wherein the first portion of the second region extends laterally into and is surrounded on three sides by at least part of the third region;
• and
• forming a contact region of the second, opposite, conductivity type at the surface of the bipolar transistor and positioned within the second central portion of the third region.

A method of forming a bipolar transistor comprising:

• forming, in a substrate, a continuous first semiconductor region of a first conductivity type having a first parts at a surface of the substrate, second parts spaced apart from and underlying the first parts at a first depth from the surface, and a central portion connecting the first and second parts;
• forming a contact region of the first conductivity type at the surface of the substrate and positioned within the first semiconductor region above the central portion of the first semiconductor region;
• forming first and second dielectric isolation regions in the first semiconductor region extending to the surface;
• forming a second semiconductor region in the substrate, wherein the second semiconductor region includes first portions lying at least partially laterally outboard of the first and second dielectric isolation regions, wherein the first portions are doped to have a second, opposite conductivity type, and the second semiconductor region also includes second portions that are doped to have the second, opposite, conductivity type and the second portions are spaced apart from the surface and extend laterally inward from the first portions a first distance at a second depth from the surface that is less than the first depth, wherein the first parts of the first semiconductor region overlie the second portions, and the second parts of the first semiconductor region underlie the second portions;
• and
• forming further doped regions of the second, opposite conductivity type in the first part of the first semiconductor region, wherein the further doped regions extend from the first surface and are spaced apart from the second portions, and wherein the second portions underlie an entirety of the further doped regions.