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US 8,946,800 B2Granted
Semiconductor device with protective layer and method of manufacturing same
AssigneeRenesas Electronics Corporation
InventorsIppei Kume, Kenichiro Hijioka, Naoya Inoue, Hiroyuki Kunishima, Manabu Iguchi, Hiroki Shirai
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Abstract
To provide a semiconductor device featuring reduced variation in capacitor characteristics. In the semiconductor device, a protective layer is provided at the periphery of the upper end portion of a recess (hole). This protective layer has a dielectric constant higher than that of an insulating layer placed in the same layer as the protective layer and configuring a multilayer wiring layer placed in a logic circuit region.
Claims26
A semiconductor device, comprising:
- a substrate;
- a multilayer wiring layer having wiring lavers provided over the substrate;
- a capacitor buried in a recess provided in the multilayer wiring layer and having a lower electrode, a capacitor insulating film, and an upper electrode;
- a logic circuit provided over the substrate;
- an upper coupling wiring to be coupled to the capacitor;
- and
- a protective layer provided at the periphery of the upper end portion of the recess;
- wherein, the protective layer has a dielectric constant higher than that of an insulating layer configuring the multilayer wiring layer having the logic circuit provided therein,
- wherein the insulating layer is placed in the same layer as the protective layer,
- wherein a trench is provided in the multilayer wiring layer,
- wherein the protective layer is placed over the bottom surface of the trench,
- wherein the recess is formed in the protective layer, and
- wherein the upper coupling wiring is placed over the protective layer and is buried in the trench.
10 more elements
A method of manufacturing a semiconductor device, comprising the steps of:
- forming a multilayer wiring layer over a substrate;
- wherein the multilayer wiring layer comprises an insulating layer and a wiring layer in the insulating layer;
- selectively removing the insulating layer in a memory circuit formation region different from a logic circuit formation region in which the wiring has been formed and thereby forming a trench;
- forming, in the trench, a protective layer having a dielectric constant higher than that of the insulating layer;
- removing at least a portion of the protective layer, thereby forming a recess;
- burying, in the recess, a lower electrode, a capacitor insulating film, and an upper electrode to form a capacitor;
- and
- forming an upper coupling wiring to be coupled onto the upper electrode,
- wherein the step of forming the upper coupling wiring includes a step of forming the upper coupling wiring over the protective layer formed at the bottom portion of the trench.
6 more elements
Dependencies are inferred from the claim text.