Resistive memory device and fabrication methods

A method for fabricating a device comprising:

• providing a substrate including a plurality of CMOS devices;
• forming a resistive memory upon the substrate comprising:
• forming a first metal material;
• forming a monolithic conductive silicon-bearing layer on top of the first metal material;
• forming an amorphous silicon and oxygen-bearing layer in a portion of the monolithic conductive silicon-bearing layer;
• and
• disposing an active metal material above the amorphous silicon and oxygen-bearing layer;
• and
• coupling the resistive memory to at least one of the plurality of CMOS devices.

A method for forming a resistive memory device comprising:

• providing a substrate comprising a first metal material;
• forming a conductive silicon-bearing layer on top of the first metal material, wherein the conductive silicon-bearing layer comprises an upper region and a lower region, and wherein the lower region is adjacent to the first metal material;
• forming an amorphous layer from the upper region of the conductive silicon-bearing layer, wherein forming the amorphous layer from the upper region comprises a process selected from a group consisting of:
• performing an Argon, silicon, and/or oxygen plasma etch on an exposed surface of the conductive silicon-bearing layer;
• and
• performing an ion implantation on the upper region of the conductive silicon-bearing, and wherein an ion for the ion implant is selected from a group consisting:
• Argon, silicon, and oxygen;
• and
• disposing an active metal material above the amorphous layer.