Method of fabricating non-volatile memory with flat cell structures and air gap isolation

A method of fabricating non-volatile storage using a substrate, comprising:

• forming a first layer stack column and a second layer stack column, each layer stack column including a tunnel dielectric strip, a charge storage strip, an intermediate dielectric strip, and a first control gate strip, the first layer stack column overlying a first active area of the substrate and the second layer stack column overlying a second active of the substrate;
• forming an isolation region in the substrate between the first active area and the second active area;
• forming a sacrificial material at least partially in the isolation region and at least partially occupying a space between the first layer stack column and the second layer stack column;
• and
• forming a dielectric cap strip over the sacrificial material, the dielectric cap strip extending between the intermediate dielectric strip in the first layer stack column and the intermediate dielectric strip in the second layer stack column, the dielectric cap strip having a lower dielectric constant than a dielectric constant of the intermediate dielectric strips.

A method of fabricating non-volatile storage using a substrate, comprising:

• forming a first layer stack column and a second layer stack column, each layer stack column including a tunnel dielectric strip, a charge storage strip, an intermediate dielectric strip, and a first control gate strip, the first layer stack column overlying a first active area of the substrate and the second layer stack column overlying a second active of the substrate, the first control gate strip in each layer stack column being formed from a first control gate layer;
• forming an isolation region in the substrate between the first active area and the second active area after forming the first layer stack column and the second layer stack column;
• forming a dielectric strip over the isolation region, the dielectric strip extending between the intermediate dielectric strip in the first layer stack column and the intermediate dielectric strip in the second layer stack column, the dielectric cap strip having a lower dielectric constant than a dielectric constant of the intermediate dielectric strips;
• forming a second control gate layer after forming the dielectric strip over the isolation region;
• and
• etching the second control gate layer, the first layer stack column, and the second layer stack column to form a plurality of layer stack rows including a first layer stack row and a second layer stack row.

A method of fabricating non-volatile storage using a substrate, comprising:

• forming a first layer stack column and a second layer stack column, each layer stack column including a tunnel dielectric strip, a charge storage strip, an intermediate dielectric strip, and a first control gate strip, the first layer stack column overlying a first active area of the substrate and the second layer stack column overlying a second active of the substrate;
• forming an isolation region in the substrate between the first active area and the second active area after forming the first layer stack column and the second layer stack column;
• forming a dielectric strip over the isolation region, the dielectric strip extending between the intermediate dielectric strip in the first layer stack column and the intermediate dielectric strip in the second layer stack column, the dielectric cap strip having a lower dielectric constant than a dielectric constant of the intermediate dielectric strips;
• forming a recess in a portion of an upper surface of the dielectric strip;
• and
• forming a second control gate layer after forming the recess, the second control gate layer extending vertically in the recess below a level of an upper surface of the first control gate strip in the first layer stack column and a level of an upper surface of the first control gate strip in the second layer stack column.