Method of making a vertical NAND device using sequential etching of multilayer stacks

A method of making a vertical NAND device, comprising:

• forming a lower portion of a memory stack over a substrate;
• forming a lower portion of memory openings in the lower portion of the memory stack;
• widening a diameter of a top part of the lower portion of the memory openings after forming the lower portion of the memory openings;
• at least partially filling the lower portion of the memory openings with a sacrificial material;
• forming an upper portion of the memory stack over the lower portion of the memory stack and over the sacrificial material;
• forming an upper portion of the memory openings in the upper portion of the memory stack to expose the sacrificial material in the lower portion of the memory openings;
• removing the sacrificial material to connect the lower portion of the memory openings with a respective upper portion of the memory openings to form continuous memory openings extending through the upper and the lower portions of the memory stack;
• forming a semiconductor channel in each continuous memory opening;
• and
• forming a memory film which comprises at least one charge storage region located between blocking and tunneling dielectric layers in each continuous memory opening prior to the step of forming the semiconductor channel.