US 8,946,011 B2Granted

Semiconductor device and manufacturing method thereof

AssigneeSemiconductor Energy Laboratory Co., Ltd.

InventorsHidekazu Miyairi, Takafumi Mizoguchi

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Abstract

A manufacturing method of a semiconductor device having a stacked structure in which a lower layer is exposed is provided without increasing the number of masks. A source electrode layer and a drain electrode layer are formed by forming a conductive film to have a two-layer structure, forming an etching mask thereover, etching the conductive film using the etching mask, and performing side-etching on an upper layer of the conductive film in a state where the etching mask is left so that part of a lower layer is exposed. The thus formed source and drain electrode layers and a pixel electrode layer are connected in a portion of the exposed lower layer. In the conductive film, the lower layer and the upper layer may be a Ti layer and an Al layer, respectively. The plurality of openings may be provided in the etching mask.

Claims18

Dependent claims

A manufacturing method of a semiconductor device, comprising the steps of:

forming a first insulating layer to cover a first conductive layer over a substrate;
forming a thin-film stack comprising a semiconductor layer over the first conductive layer with the first insulating layer interposed therebetween and an impurity semiconductor layer over the semiconductor layer;
forming a stacked conductive film comprising a second conductive film and a third conductive film over the second conductive film, so that the stacked conductive film covers the thin-film stack;
forming an etching mask over the stacked conductive film;
performing etching on the stacked conductive film using the etching mask, so that a second conductive layer is formed using the second conductive film and a third conductive layer over the second conductive layer is formed using the third conductive film;
performing side-etching on the third conductive layer so that a part of a top surface of the second conductive layer is exposed in a direction vertical to a surface of the substrate;
performing etching on the thin-film stack, so that the semiconductor layer in a portion that does not overlap with the etching mask is exposed;
removing the etching mask;
forming a second insulating layer over the first insulating layer, the etched thin-film stack, the second conductive layer, and the etched third conductive layer;
forming a contact hole in the second insulating layer, so that the contact hole overlaps with the part of the top surface of the second conductive layer;
and
forming a fourth conductive layer over the second insulating layer so that the fourth conductive layer is connected to the part of the top surface of the second conductive layer through the contact hole.

9 more elements

A manufacturing method of a semiconductor device, comprising the steps of:

forming a first insulating layer to cover a first conductive layer over a substrate;
wherein the first insulating layer comprises a first region covering the first conductive layer and a second region outside the first region;
forming a stacked layer over the first insulating layer;
wherein the stacked layer comprises a first semiconductor layer and a second semiconductor layer over the first semiconductor layer, and
wherein the second semiconductor layer comprises an impurity element imparting one conductivity type;
forming a stacked conductive film to cover the stacked layer;
performing etching on the stacked conductive film using an etching mask so that a stacked conductive layer is formed over the first insulating layer;
wherein the stacked conductive layer comprises a second conductive layer and a third conductive layer over the second conductive layer, and
wherein each of the second conductive layer and the third conductive layer is provided over the first region and the second region;
performing side-etching on the third conductive layer, so that a part of the third conductive layer over the first region is removed and a top surface of the second conductive layer over the second region is exposed in a direction vertical to a surface of the substrate;
performing etching on the stacked layer so that a part of the first semiconductor layer is exposed;
removing the etching mask;
forming a second insulating layer over the first insulating layer, the etched stacked layer, the second conductive layer, and the etched third conductive layer;
forming a contact hole in the second insulating layer so that the contact hole overlaps with a part of the top surface of the second conductive layer over the second region;
and
forming a fourth conductive layer over the second insulating layer, the fourth conductive layer in contact with the part of the top surface of the second conductive layer over the second region through the contact hole.

13 more elements

Dependencies are inferred from the claim text.

Facts

Application: 13/223,812Filed 1 Sep 2011
Priority: JP 2010-1980183 Sep 2010
Published: US 2012/0056182 A18 Mar 2012
Granted: 3 Feb 2015
Term ends: Not estimatedThe source records don’t support an estimate.

Classification11 codes

H10D 30/6732
Characterised by the shapes, relative sizes or dispositions of the gate electrodes: bottom-gate only TFTs
H10D 30/0316
Characterised by the gate electrodes: of lateral bottom-gate TFTs comprising only a single gate
H10D 30/0321
Of thin-film transistors [TFT]: comprising silicon, e.g. amorphous silicon or polysilicon
H10D 30/6706
Having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device: for…