Method of forming transistors with ultra-short gate feature

A method of forming semiconductor transistors, comprising:

• forming first and second gate electrodes over but insulated from a semiconductor body region;
• forming off-set spacers along side-walls of the first and second gate electrodes;
• after forming the off-set spacers, performing a DDD implant to form DDD source and drain regions in the semiconductor body region adjacent the first gate electrode;
• after forming the off-set spacers, performing an LDD implant to form LDD source and drain regions in the semiconductor region adjacent the second gate electrode;
• forming main spacers along the off-set spacers of the first and second gate electrodes;
• and
• after forming the main spacers, performing a first source/drain (S/D) implant to form highly doped first source and first drain regions in the respective DDD and LDD source and drain regions such that the DDD and LDD source and drain regions each extend into the semiconductor body region to a greater depth than the greatest depth of the highly doped first source and first drain regions, wherein the highly doped first source and first drain regions have the same conductivity type as but greater doping concentration than the DDD and LDD source and drain regions.