Integrated circuits having improved split-gate nonvolatile memory devices and methods for fabrication of same

A method for fabricating an integrated circuit having a split-gate nonvolatile memory device, the method comprising:

• providing a semiconductor substrate having an upper surface;
• depositing a dielectric layer overlying the upper surface of the semiconductor substrate;
• depositing a spacer material overlying the dielectric layer;
• etching through the spacer material and the select gate dielectric layer and into the semiconductor substrate to form a trench in the semiconductor substrate;
• forming a charge storage structure in the trench, wherein the charge storage structure defines an interior cavity and wherein the charge storage structure includes an upper portion having a first sidewall and a second sidewall above the upper surface of the semiconductor substrate;
• forming a control gate in the interior cavity;
• forming a first select gate overlying the upper surface of the semiconductor substrate and adjacent the first sidewall of the charge storage structure, wherein the first select gate and the control gate form a first memory cell;
• and
• forming a second select gate overlying the upper surface of the semiconductor substrate and adjacent the second sidewall of the charge storage structure, wherein the second select gate and the control gate form a second memory cell.