Semiconductor package and method of manufacturing the same

#The inventive concepts relates to semiconductor packages, and more particularly, to semiconductor packages with reduced stress and/or methods of manufacturing the same.

#In general, semiconductor chips formed by performing several semiconductor processes on a wafer undergo a packaging process to thereby form a semiconductor package. A semiconductor package may include a semiconductor chip, a printed circuit board (PCB) on which the semiconductor chip is mounted, a bonding wire or a bump that electrically connects the semiconductor chip to the PCB, and a seal that seals the semiconductor chip. With higher integration of semiconductor packages, the reliability and workability of the semiconductor packages is desired.

#The inventive concepts provide a semiconductor package with reduced stress that is easy to be handled in a semiconductor package process and that reduces or effectively prevents warpage, and/or a method of manufacturing the semiconductor package.

#Example embodiments of the inventive concepts will be more clearly understood from the following detailed description taken in conjunction with the accompanying drawings in which:

#FIGS. 1 through 5A and 5b through 14 are cross-sectional views of semiconductor packages according to some example embodiments of the inventive concepts;

#FIGS. 15A through 15J are sectional views illustrating a method of manufacturing the semiconductor package illustrated in FIG. 5, according to an example embodiment of the inventive concepts;

#It should be noted that these figures are intended to illustrate the general characteristics of methods, structure and/or materials utilized in certain example embodiments and to supplement the written description provided below. These drawings are not, however, to scale and may not precisely reflect the precise structural or performance characteristics of any given embodiment, and should not be interpreted as defining or limiting the range of values or properties encompassed by example embodiments. For example, the relative thicknesses and positioning of molecules, layers, regions and/or structural elements may be reduced or exaggerated for clarity. The use of similar or identical reference numbers in the various drawings is intended to indicate the presence of a similar or identical element or feature.

#The inventive concept will now be described more fully with reference to the accompanying drawings, in which exemplary embodiments of the inventive concept are shown. The inventive concept may, however, be embodied in many different forms and should not be construed as being limited to the example embodiments set forth herein; rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the inventive concept to those skilled in the art.

#When an element is hereinafter referred to as being “connected” to another element, it can be directly connected to the other element or intervening elements may be present. In contrast, when an element is referred to as being “directly connected” or “directly coupled” to another element, there are no intervening elements present. As used herein the term “and/or” includes any and all combinations of one or more of the associated listed items. Other words used to describe the relationship between elements or layers should be interpreted in a like fashion (e.g., “between” versus “directly between,” “adjacent” versus “directly adjacent,” “on” versus “directly on”). Similarly, when an element is referred to as being “on” another element or layer, the element can be directly on another element or intervening elements may be present.