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US 8,945,984 B2Granted
Bump-on-trace methods and structures in packaging
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorJiun Yi Wu
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Abstract
A method and structure for bump-on-trace bonding is provided. In an embodiment traces to be used for bump-on-trace (BOT) bonding are protected during a pre-solder treatment. The pre-solder treatment improves the adhesion between the exposed traces (e.g., the non-BOT traces) and a solder resist layer.
Claims19
A method of forming an electrical device, the method comprising:
- providing a first substrate having a first trace and a second trace;
- forming a mask over the first trace;
- treating the second trace while the first trace is protected by the mask, the treating forming a treated portion of the second trace, wherein the treating roughens a surface of the second trace;
- removing the mask;
- and
- forming a protective layer directly over the treated portion of the second trace.
3 more elements
A method of forming an electrical device, the method comprising:
- providing a first substrate having a first trace and a second trace;
- roughening a surface of the second trace;
- and
- forming an undercut region in the second trace along a surface of the first substrate, the undercut region in the second trace being greater than an undercut region in the first trace.
1 more element
A method of forming an electrical device, the method comprising:
- providing a first substrate having a plurality of traces;
- protecting a first set of traces, the first set of traces being a subset of the plurality of traces;
- roughening a surface of a second set of traces while the first set of traces is protected, the second set of traces being a subset of the plurality of traces;
- and
- connecting a second substrate to the first substrate with a bump-on-trace using the first set of traces.
2 more elements
Dependencies are inferred from the claim text.