System and method to improve package and 3DIC yield in underfill process

A method for integrated circuit packaging comprising:

• attaching a device die to a packaging substrate to form a packaging unit;
• placing the packaging unit on a bottom carrier of a jig;
• placing a top cover of the jig over the packaging unit, wherein the top cover comprises a first window exposing a first portion of the packaging unit corresponding to the device die, and wherein the top cover further covers a second portion surrounding the first portion of the packaging unit;
• and
• applying a plasma treatment to the first portion of the packaging unit through the first window of the jig, wherein the top cover of the jig is affixed to the bottom carrier of the jig while applying the plasma treatment.

A method packaging a semiconductor device comprising:

• attaching a plurality of semiconductor devices to a plurality of packaging substrates, respectively, to form a plurality of packaged semiconductor devices;
• exposing first portions of the plurality of packaged semiconductor devices corresponding to the plurality of semiconductor devices while covering second portions of the plurality of the packaged devices using a jig comprising a top cover and a bottom carrier;
• selectively applying a hydrophilic surface treatment to the first portions of the plurality of packaging substrates corresponding to the plurality of semiconductor devices, wherein the top cover is affixed to the bottom carrier while selectively applying the hydrophilic surface treatment;
• and
• applying an underfill material to the first portions of the plurality of packaged semiconductor devices.