Method for fabricating variable resistance memory device

A method for fabricating a variable resistance memory device, comprising:

• sequentially forming a first conductive layer for wiring, a first conductive layer for electrode, a variable resistance layer, and a second conductive layer for electrode on a substrate;
• forming stacked structures in which a first wiring, a first electrode, a variable resistance line, and a second electrode are sequentially stacked by selectively etching the second conductive layer for electrode, the variable resistance layer, the first conductive layer for electrode, and the first conductive layer for wiring;
• forming an insulating layer to fill a space between the stacked structures;
• forming the second conductive layer for wiring on the insulating layer and the stacked structures;
• and
• forming a second wiring, a second electrode pattern, and a variable resistance pattern by etching the second conductive layer for wiring, the second electrode, and the variable resistance line using a mask pattern, wherein the mask pattern forms lines that extend in a direction crossing a direction that the stacked structures extend.

A method for fabricating a variable resistance memory device, comprising:

• sequentially forming a first conductive layer and a first variable resistance layer on a substrate;
• forming first stacked structures in which first conductive lines and first variable resistance lines are sequentially stacked by selectively etching the first variable resistance layer and the first conductive layer;
• forming a first insulating layer to fill a space between the first stacked structures;
• sequentially forming a second conductive layer and a second variable resistance layer on the first insulating layer and the first stacked structure;
• forming second stacked structures in which a first variable resistance pattern, a second conductive line, and a second variable resistance line are sequentially stacked by etching the second variable resistance layer, the second conductive layer, and the first variable resistance line using a mask pattern, wherein the mask pattern forms lines that extend in a direction crossing a direction that the first stacked structures extend;
• forming a second insulating layer to fill a space between the second stacked structures;
• and
• forming a third conductive layer on the second insulating layer and the second stacked structure.