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AssigneeScienBiziP Consulting(Shenzhen)Co., Ltd.
InventorsYu-Hsu Lin, Guang-Feng Ou
Estimating the term…
A testing system for testing a layout of a power pin of a chipset on a circuit board includes a layout information obtaining module, a power pin sorting module, a transmission line sorting module, a transmission line length calculating module, and a report generating module. The layout information obtaining module obtains layout information of the printed circuit board. The power pin sorting module sorts the power pin from a number of pins of the chipset. The transmission line sorting module sorts transmission lines that are connected to the power pin and are located on outer layers of the printed circuit board. The transmission line length calculating module calculates a total length of the transmission lines sorted by the transmission line sorting module and compares the total length with a threshold length. The report generating module generates a testing report indicating whether or not the power pin is qualified.
A computing device for testing a layout of a power pin of a chipset on a circuit board, the computing device comprising:
A circuit board, connected to a computing device comprising at least one processor, the at least one processor configured to:
A non-transitory computer-readable storage medium having instructions stored thereon that, when executed by at least one processor of a computing device, cause the computing device to perform a method for testing a layout of a power pin of a chipset on a circuit board, the method comprising:
Dependencies are inferred from the claim text.